Input/output control system and method for direct memory transfer according to location addresses provided by the source unit and destination addresses provided by the destination unit

In a digital data processing apparatus of the type having at least first and second functional units,

• each of which includes associated memory means for storing data at addressable locations therein,
• each said memory means being responsive in a read mode to an applied address signal for generating a data signal representative of data stored at a location specified by such address signal, and being responsive in a write mode to applied address and data signals for storing at locations specified by such address signals data specified by such data signal,
• said data processing apparatus further including
• controller means coupled to said first and second functional units for transferring data therebetween,
• the improvement wherein
• A. said first functional unit includes sender means for generating and transferring to said controller a send MDB signal specifying one or more addresses from which data is to be transferred from the memory means associated with said first functional unit,
• said second functional unit includes receiver means for generating and transferring to said controller a receive MDB signal specifying one or more addresses to which data is to be transferred in the memory means associated with said second functional unit,
• B. said controller means includes MDB matching means, coupled to said sender and receiver means, for matching at least a selected one of said send MDB signals to a selected one of said receive MDB signals to generate a signal for effecting the transfer of data between respective locations of the memory means associated with said first and second functional units specified by the matching MDB signals, and
• C. said controller means further including data transfer means, coupled to said MDB matching means and to the memory means associated with said first and second functional units, for responding to said transfer-effecting signal for
• i) applying to the memory means associated with the first functional unit an address signal representative of addresses specified in the send MDB signal, and receiving therefrom data signals generated thereby in response to application of that address signal,
• ii) applying those data signals to the memory means associated with said second functional unit, along with an address signal representative of addresses specified in said receive MDB signal.