DC removal circuit for digital signal
AssigneeZenith Electronics Corporation
InventorRudolf Turner
Life of this patent
Estimating the term…
Abstract
A DC removal circuit for removing residual DC from a digitally encoded signal including a plurality of multi level data symbols occurring at a constant symbol rate and formatted in repetitive data fields, each including repetitive data segments having data segment sync. A derived value is subtracted from each of the received data symbols. The output of the subtractor is sampled, at a rate that is less than the symbol rate, and the sampled output is accumulated in an accumulator for generating the derived value. The sampling is synchronized with the data segment sync to avoid sampling the data segment sync and the accumulator is disabled until data segment lock is achieved.
Claims11
A method of removing DC from a digitally encoded input signal comprising a plurality of multi level data symbols having a repetition rate F.sub.s comprising:
- subtracting a derived value from each of the data symbols for removing the DC component of said encoded input signal and producing a subtracted signal output;
- sampling said subtracted signal output at a rate less than F.sub.s to produce plurality of samples;
- and
- accumulating the samples for generating said derived value.
A DC removal circuit comprising:
- means for receiving a digitally encoded input signal comprising a plurality of multi level data symbols having a repetition rate F.sub.s and having levels above and below a zero value;
- subtracting means for subtracting a derived value from each of said multi level data symbols for substantially removing the DC component of said encoded input signal;
- means for sampling the output of said subtracting means at a rate less than F.sub.s to produce plurality of samples;
- and
- means for accumulating the samples for generating said derived value.
Dependencies are inferred from the claim text.