Method and apparatus for inhibiting a predecoder when selecting a redundant row line

An array of integrated circuits, comprising:

• an array area in which said integrated circuits are formed;
• a plurality of decoding circuits formed in said array area each for decoding selected ones of a plurality of addressing signals and each operable to select at least one of a plurality of signal paths to respective integrated circuits in response thereto, said decoding circuit including a predecoder coupled to a drive source and a plurality of decoders coupled to said predecoder by a plurality of predecoder lines, said predecoder disabled from establishing a signal path from said drive source to said decoders in response to said predecoder receiving a disable signal;
• for each decoding circuit, a redundant decoder formed in said array area and programmable for responding to predetermined ones of said addressing signals by generating said disable signal and by selecting a redundant signal path, at least one redundant integrated circuit coupled to said redundant signal path;
• and
• each said decoding circuit coupled to a respective redundant decoder for receiving said disable signal therefrom, said decoding circuit not decoding said predetermined ones of said addressing signals in response to receiving said disable signal, such that said drive source is routed to said redundant integrated circuit instead of an integrated circuit corresponding to said predetermined ones of said addressing signals.

A memory array, comprising:

• a drive source;
• a plurality of memory cell arrays arranged in rows and columns, each cell array having a plurality of row lines for accessing respective pluralities of memory cells;
• for each cell array, at least one decoding circuit for decoding selected ones of a plurality of addressing signals and selecting at least one of a plurality of signal paths from said drive source to at least one of said row lines in response thereto;
• for each decoding circuit, a predecoder coupled to said drive source and a plurality of decoders coupled to said predecoder by a plurality of predecoder lines, said predecoder disabled from establishing a signal path from said drive source to said decoders in response to said predecoder receiving a disable signal, a redundant decoder programmable for responding to addressing signals corresponding to a defective row line by both generating said disable signal and by coupling said drive source to a redundant row line;
• and
• said decoding circuit coupled to said redundant decoder for receiving said disable signal therefrom and disabled from decoding said addressing signals in response to receiving said disable signal.

A method for replacing a defective signal path by a redundant signal path, comprising the steps of:

• transmitting addressing signals to a redundant decoder and a signal path decoding circuit, said decoding circuit including a predecoder coupled to a drive source and a plurality of decoders coupled to said predecoder by a plurality of predecoder lines;
• programming said redundant decoder to transmit a decoding-inhibiting signal to the predecoder in response to said redundant decoder receiving addressing signals corresponding to a defective signal path;
• disabling the predecoder from establishing a signal path from said drive source to said plurality of decoders in response to said predecoder receiving the decoding-inhibiting signal;
• and
• selecting the redundant signal path in response to the redundant decoder receiving said addressing signals corresponding to said defective signal path.

A method for replacing a defective row line in an array of memory cells arranged in rows and columns, each row of cells coupled to a respective row line, comprising the steps of:

• programming a redundant decoder to respond to addressing signals that correspond to the defective row line;
• receiving the addressing signals by the redundant decoder and a signal path decoding circuit coupled to the row lines;
• transmitting a disable signal from the redundant decoder to the decoding circuit in response to receiving the addressing signals corresponding to the defective row line, said decoding circuit including a predecoder coupled to a drive source and a plurality of decoders coupled to predecoder lines;
• disabling the predecoder from establishing a signal path from said drive source to said decoders in response to said predecoder receiving the disable signal;
• and
• selecting a redundant row line in response to the redundant decoder receiving the addressing signals corresponding to the defective row line.