Digital wave synthesizer with address conversion for reducing memory capacity

Abstract

A digital synthesizer is provided with an address converter means for converting a phase value in the region of small amplitude change all to a predetermined value, utilizing the characteristics of a sinusoidal function. In addition, a digital synthesizer is provided with a second address converter for converting the phase value in a range of 0.degree..about.360.degree. to a phase value of 0.degree..about.90.degree. and an output data inverter inverting the memory output in response to the phase value. By converting a phase value in the region of a small amplitude change to a predetermined value, the amplitude value to be stored in the memory can be reduced by that degree, and reduction in the memory capacity and reduction in the power dissipation are achieved. Furthermore, by converting the phase value in a range of 0.degree..about.360.degree. to a phase value of 0.degree..about.90.degree. utilizing symmetry of the sinusoidal function, the amplitude value to be stored in the memory can be reduced to one-fourth, thereby further reduction in the memory capacity and further reduction in the power dissipation are achieved.

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