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US 5,475,325 AGranted
Clock synchronizing circuit
AssigneeNEC Corporation
InventorToshiya Nezu
Life of this patent
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Abstract
A clock synchronizing circuit includes a voltage controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals. A phase comparator compares a phase of an input signal and a phase of the output signal to thereby generate a phase difference signal. A filter filters the phase difference signal to thereby output a filtered phase difference signal. A frequency synchronizing circuit responsive to the filtered phase difference signal generates a first compensation signal for controlling a frequency of the output signal. A phase synchronizing circuit responsive to the filtered phase difference signal generates a second compensation signal for controlling a phase of the output signal. A signal supplying circuit feeds the first and second compensation signals as the control signals.
Claims13
A clock synchronizing circuit comprising:
- a voltage-controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals;
- comparing means for comparing a phase of an input signal and a phase of said output signal to thereby generate a phase difference signal;
- filtering means for filtering said phase difference signal to thereby output a filtered phase difference signal;
- frequency synchronizing means responsive to said filtered phase difference signal for generating a first compensation signal for controlling a frequency of said output signal;
- phase synchronizing means responsive to said filtered phase difference signal for generating a second compensation signal for controlling a phase of said output signal;
- means for feeding said first and second compensation signals as said control signals;
- means for generating an interruption signal on detecting interruption of said input signal;
- and
- means responsive to said interruption signal for controlling generation of said first and second compensation signals,
- wherein said frequency synchronizing means comprises a plurality of selectors for outputting predetermined control quantities signals in response to respective output signals from said filtering means and said interruption signal generating means, and a plurality of adders, a first adder being coupled to a first selector of said plurality of selectors and for receiving an output from said first selector,
- wherein a second adder of said plurality of adders is for receiving an output from another selector of said plurality of selectors.
8 more elements
A clock synchronizing circuit comprising:
- a voltage-controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals;
- comparing means for comparing a phase of an input signal and a phase of said output signal to thereby generate a phase difference signal;
- filtering means for filtering said phase difference signal to thereby output a filtered phase difference signal;
- frequency synchronizing means responsive to said filtered phase difference signal for generating a first compensation signal for controlling a frequency of said output signal;
- phase synchronizing means responsive to said filtered phase difference signal for generating a second compensation signal for controlling a phase of said output signal;
- means for feeding said first and second compensation signals as said control signals;
- means for generating an interruption signal on detecting interruption of said input signal;
- and
- means responsive to said interruption signal for controlling generation of said first and second compensation signals,
- wherein said frequency synchronizing means comprises a plurality of selectors for outputting predetermined control quantities signals in response to respective output signals from said filtering means and said interruption signal generating means, and a plurality of adders, a first adder being coupled to a first selector of said plurality of selectors and for receiving an output from said first selector,
- wherein said frequency synchronizing means further comprises a plurality of flipflops, a first flipflop of said plurality of flipflops for receiving an output from said first adder and for providing an output to a second adder of said plurality of adders and a feedback signal to said first adder.
8 more elements
A clock synchronizing circuit comprising:
- a voltage-controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals;
- comparing means for comparing a phase of an input signal and a phase of said output signal to thereby generate a phase difference signal;
- filtering means for filtering said phase difference signal to thereby output a filtered phase difference signal;
- frequency synchronizing means responsive to said filtered phase difference signal for generating a first compensation signal for controlling a frequency of said output signal;
- phase synchronizing means responsive to said filtered phase difference signal for generating a second compensation signal for controlling a phase of said output signal;
- means for feeding said first and second compensation signals as said control signals;
- means for generating an interruption signal on detecting interruption of said input signal;
- and
- means responsive to said interruption signal for controlling generation of said first and second compensation signals,
- wherein said frequency synchronizing means comprises a plurality of selectors for outputting predetermined control quantities signals in response to respective output signals from said filtering means and said interruption signal generating means, and a plurality of adders, a first adder being coupled to a first selector of said plurality of selectors and for receiving an output from said first selector,
- wherein said frequency synchronizing means further comprises a digital-to-analog (D/A) converter for receiving an output from a second adder of said plurality of adders and for providing an output to said voltage-controlled oscillator, said second adder being operatively coupled to another selector of said plurality of selectors and for receiving an output of said another selector of said plurality of selectors.
8 more elements
A clock synchronizing circuit comprising:
- a voltage-controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals;
- comparing means for comparing a phase of an input signal and a phase of said output signal to thereby generate a phase difference signal;
- filtering means for filtering said phase difference signal to thereby output a filtered phase difference signal;
- frequency synchronizing means responsive to said filtered phase difference signal for generating a first compensation signal for controlling a frequency of said output signal;
- phase synchronizing means responsive to said filtered phase difference signal for generating a second compensation signal for controlling a phase of said output signal;
- means for feeding said first and second compensation signals as said control signals;
- means for generating an interruption signal on detecting interruption of said input signal;
- and
- means responsive to said interruption signal for controlling generation of said first and second compensation signals,
- wherein said frequency synchronizing means comprises a plurality of selectors for outputting predetermined control quantities signals in response to respective output signals from said filtering means and said interruption signal generating means, and a plurality of adders, first adder being coupled to a first selector of said plurality of selectors and for receiving an output from said first selector,
- wherein a second adder of said plurality of adders is for receiving an output from another selector of said plurality of selectors.
- means for generating a temperature compensation signal matching an ambient temperature;
- and
- means for adding said temperature compensation signal to said control signals,
- wherein said temperature compensation signal generating means comprises a temperature-to-voltage (T/V) converter for outputting a voltage signal corresponding to the ambient temperature.
12 more elements
A clock synchronizing circuit comprising:
- a voltage-controlled oscillator (VCO) for producing an output signal whose oscillation frequency changes in response to control signals;
- comparing means for comparing a phase of an input signal and a phase of said output signal to thereby generate a phase difference signal;
- filtering means for filtering said phase difference signal to thereby output a filtered phase difference signal;
- frequency synchronizing means responsive to said filtered phase difference signal for generating a first compensation signal for controlling a frequency of said output signal;
- phase synchronizing means responsive to said filtered phase difference signal for generating a second compensation signal for controlling a phase of said output signal;
- means for feeding said first and second compensation signals as said control signals;
- means for generating an interruption signal on detecting interruption of said input signal;
- and
- means responsive to said interruption signal for controlling generation of said first and second compensation signals,
- wherein said frequency synchronizing means comprises a plurality of selectors, at least some of which selectively receive said interruption signal from said interruption means,
- wherein when said interruption signal from said interruption means is absent, first and second selectors of said plurality of selectors output a first predetermined control quantity signal depending upon said filtered phase difference signal received by said frequency synchronizing means having either a first state or a second state,
- wherein said frequency synchronizing means further comprises a flipflop for receiving said filtered phase difference signal,
- wherein when said interruption signal from said interruption means is absent, third and fourth selectors of said plurality of selectors output a second predetermined control quantity signal depending upon an output of said flipflop having either a first state or a second state, and
- wherein said first predetermined control quantity signal is used when a phase difference between input and output clocks of said circuit is larger than a predetermined value and wherein said second predetermined control quantity signal is used when the phase difference between the input and output clocks of said circuit is no more than a predetermined value.
11 more elements
Dependencies are inferred from the claim text.