Data processing with a self-timed approach to spurious transitions
AssigneeTexas Instruments Incorporated
InventorUming Ko
Life of this patent
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Abstract
A digital electronic device includes a digital circuit responsive to a logic transition at an input thereof to produce at an output thereof a spurious logic transition ultimately followed by a stable logic level. A transition detector produces a detection signal in response to the logic transition at the digital circuit input, the transition detector including a latch circuit having an output for producing the detection signal. A self-timed circuit receives the detection signal and, after delaying for a suitable time, produces a done signal. A switching circuit is responsive to the done signal to connect the digital circuit output to a selected logic node.
Claims19
A digital electronic device, comprising:
- digital circuitry having a plurality of inputs and responsive to a logic transition at one of said inputs to produce at an output thereof a spurious logic transition ultimately followed, after a settling time has elapsed since said input logic transition, by a stable logic level;
- a transition detector for detecting an occurrence of a logic transition at any of said inputs and producing a detection signal indicative of said occurrence, said transition detector including a latch circuit having an output for producing said detection signal;
- a self-timed circuit connected to said latch circuit output for receiving said detection signal and, after delaying for an amount of time which is approximately equal to said settling time, producing a done signal;
- and
- switching circuitry having a data input connected to said output of said digital circuitry and having a control input for receiving said done signal from said self-timed circuit, said switching circuitry responsive to said done signal to connect said data input thereof to a data output thereof.
A data processing system, comprising:
- data processing circuitry for performing data processing operations;
- peripheral circuitry connected to said data processing circuitry for communication with said data processing circuitry;
- and
- said data processing circuitry including digital circuitry having a plurality of inputs and responsive to a logic transition at one of said inputs to produce at an output thereof a spurious logic transition ultimately followed, after a settling time has elapsed since said input logic transition, by a stable logic level, a transition detector for detecting an occurrence of a logic transition at any of said inputs and producing a detection signal indicative of said occurrence, said transition detector including a latch circuit having an output for producing said detection signal, a self-timed circuit connected to said latch circuit output for receiving said detection signal and, after delaying for an amount of time which is approximately equal to said settling time, producing a done signal, and switching circuitry having a data input connected to said output of said digital circuitry and having a control input for receiving said done signal from said self-timed circuit, said switching circuitry responsive to said done signal to connect said data input thereof to a data output thereof.
A method of isolating a spurious logic transition, comprising the steps of:
- detecting an occurrence of a logic transition at an input of a digital circuit, and using a latch circuit to produce a detection signal indicative of said occurrence;
- in response to the occurrence of the logic transition at the input of the digital circuit, producing a spurious logic transition at an output of the digital circuit;
- in response to production of said detection signal, delaying for an amount of time adequate to permit said digital circuit output to reach a stable logic level, and thereafter producing a done signal;
- and
- connecting said digital circuit output to an input of another digital circuit in response to said done signal.
Dependencies are inferred from the claim text.