Secure non-volatile memory cell
AssigneeNational Semiconductor Corporation
InventorsMax C. Kuo, James M. Jaffe
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AssigneeNational Semiconductor Corporation
InventorsMax C. Kuo, James M. Jaffe
Estimating the term…
An improved EEPROM cell structure is disclosed which provides protection against external detection of data stored within the cell. One or more cavities filled with a high etching film and extending in a substantially vertical direction are provided in a region adjacent to an end of the floating gate such that during an attempted deprocessing of the cell using an etching process, the etchant will rapidly diffuse through these cavities and expose the floating gate via these cavities before exposing and removing the control gate via the insulating layers overlapping the control gate. Any charge once present on the floating gate will dissipate before the control gate can be removed, thereby making it impossible to read data stored within the cell. In another embodiment, a sliver region of the floating gate extends laterally beyond the end of the control gate such that any etchant reaching the control gate will expose the sliver region prior to etching through the control gate, thereby discharging the floating gate before the control gate is removed.
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.