System for controlling data stream by changing fall through FIFO last cell state of first component whenever data read out of second component last latch
AssigneeIntel Corporation
InventorDave Dunning
Life of this patent
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AssigneeIntel Corporation
InventorDave Dunning
Estimating the term…
A method and apparatus providing for high speed data transfers between a sending component and a receiving component is disclosed. In accordance with the present invention, in addition to handshake logic, the receiving component incorporates means for temporarily storing data words sent to the receiving component. The sending component incorporates, in addition to handshake logic, means for determining whether the aforementioned means for temporarily storing data is full, and therefore, unable to accept additional data. The sending component streams data words to the receiving component without the need for an acknowledge signal until it determines that the means for temporarily storing data is full. Asynchronous with this streaming of data words, whenever the receiving component reads a data word from the means for temporarily storing data, it sends an acknowledge signal to the sending component. This acknowledge signal is coupled to the sending component and thereby communicates to the means for determining whether the means for temporarily storing data is full that additional space for a data word is available.
An apparatus for streaming data from a first self-timed integrated circuit component (STIC1) to a second self-timed integrated circuit component (STIC2), said apparatus comprising:
In an integrated circuit (IC) combination comprising a first self-timed IC component (STIC1) and a second self-timed IC component (STIC2) coupled to each other, a method for streaming data from said STIC1 to said STIC2, said method comprising the steps of:
A computer system comprising:
Dependencies are inferred from the claim text.