US 5,473,636 AGranted

Data discriminating circuit and an optical receiver using the same

AssigneeFujitsu Limited

InventorHiroyuki Rokugawa

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Abstract

A data discriminating circuit which discriminates a signal, particularly, a data discriminating circuit which can perform data discrimination with the proper phase relation settled between data and a clock with a simple circuit structure. The data discriminating circuit comprises a clock distributor for generating first and second clock signals having different phases, first and second data discriminating/judging sections for respectively receiving the first and second clock signals and commonly receiving data, and a discriminated-data selecting section, which receives first discriminated data discriminated with the first clock signal, a discrimination/judgment result based on the phase relation between the first discriminated data and the first clock signal, second discriminated data discriminated with the second clock signal, and a discrimination/judgment result based on the phase relation between the second discriminated data and the second clock signal, and selectively outputs the first or second discriminated data based on both discrimination/judgment results.

Claims24

Dependent claims

A data discriminating circuit for discriminating digital data signals comprising:

a data input section for inputting a digital data signal;
a clock distributor section for outputting first and second clock signals having different phases from each other;
a first data discriminating/judging section for receiving the first clock signal from the clock distributor section and the input digital data signal from the data input section and providing a first discriminated digital data signal and a first result of discriminating the input digital data signal with the first clock signal;
a second data discriminating/judging section for receiving the second clock signal from the clock distributor section and the input digital data signal from the data input section and providing a second discriminated digital data signal and a second result of discriminating the input digital data signal with the first clock signal;
and
a discriminated-data selecting section for receiving the first and second results of discriminating the input digital data signal respectively from the first and second data discriminating/judging sections and selectively outputting the first discriminated digital data signal or the second discriminated digital data signal based on the first and second results of discriminating the input digital data signal.

3 more elements

Dependencies are inferred from the claim text.