Memory card having an integrated circuit for the secure counting down of units

Abstract

In a memory card designed to count down a number of units by successive programming of non-volatile, electrically erasable and electrically programmable memory cells, the memory is organized into N rows of P cells, the weight of the cells of one row in the account being P times the weight of the next-ranking row. The countdown procedure is recurrent and consists in making a search, in scanning the memory according to the rising order of weights, of an erased cell, programming this cell and an erased cell and then erasing the entire row having an immediately lower rank unless the erased cell is located in the first row, and in recommencing this recurrent procedure until an erased cell is found in the first line. The auxiliary cell enables the detection of an abnormal interruption of the recurrent procedure and the restoring of the exact account of the memory which could have been distorted by this abnormal interruption.

Dependencies are inferred from the claim text.