Complex arithmetic processor and method

A complex arithmetic processor comprising:

• a host interface for distributing data;
• a left memory and a right memory, each applied to the host interface, the left memory and the right memory for storing the data;
• a Z memory coupled to the host interface, the Z memory for storing Z memory data;
• a right/left switch coupled to the left memory and to the right memory, wherein the right/left switch makes the left memory a data source and a right memory data destination in a first setting, and makes the right memory the data source and the left memory the data destination in a second setting and wherein the right/left switch comprises a destination selector coupled to the exponent determiner and to both the right and left memories, the destination selector for determining a destination for the result;
• and
• an arithmetic engine coupled to the host interface, to the Z memory, and to the left and right memories, the arithmetic engine for performing an operation on the data to produce a result using the data and the Z memory data.