Apparatus for computing power consumption of MOS transistor logic function block

Apparatus for computing power consumption in an MOS transistor logic function block, comprising:

• circuit information deriving means for deriving circuit information appropriate for a logic function block of interest based on a plurality of input and output varying signals to and from said logic function block, a plurality of load capacitance data, and a net list;
• slew rate determining means for determining an input slew rate based on information from said circuit information deriving means;
• a memory section containing a plurality of expressions for use in computation of power consumption caused by a through-current, each expression corresponding to a different one of various types of logic function blocks and representing power consumption caused by said through-current as a function of said input slew rate and said plurality of load capacitance data;
• and
• means for determining power consumption due to said through-current by substituting the said input slew rate as determined by said slew rate determining means and said plurality of load capacitance data into a computation expression as read from said memory section.

A method for computing a total power consumption in a plurality of MOS transistor logic function blocks, comprising the steps of:

• deriving circuit information for each of said logic function blocks;
• said circuit information including a plurality of load capacitances, one load capacitance for each of said logic function blocks;
• said circuit information including a plurality of input signal changes, one input signal change for each logic function block;
• said circuit information including a plurality of output signal changes, one output signal change for each logic function block;
• determining an input slew rate for each of said logic function blocks;
• storing a plurality of formulas for computing a first plurality of power consumptions;
• a different one of each of said formulas associated with a different type of logic function block;
• said plurality of formulas being expressed as a function of said input slew rate;
• computing said first plurality of power consumptions;
• computing a second plurality of power consumptions;
• summing said first plurality of power consumptions to obtain a through-current power consumption;
• summing said second plurality of power consumptions to obtain a load capacitance power consumption;
• and
• summing said load capacitance power consumption and said through-current power consumption to obtain a total power consumption.

A method for computing a total power consumption in a plurality of MOS transistor logic function blocks, comprising the steps of:

• deriving circuit information for each of said logic function blocks;
• said circuit information including a plurality of load capacitances, one load capacitance for each of said logic function blocks;
• said circuit information including a plurality of input signal changes, one input signal change for each logic function block;
• said circuit information including a plurality of output signal changes, one output signal change for each logic function block;
• determining an input slew rate for each of said logic function blocks;
• storing a plurality of formulas for computing a first plurality of power consumptions;
• a different one of each of said formulas associated with a different type of logic function block;
• said plurality of formulas being expressed as a function of said input slew rate and said load capacitance;
• computing said first plurality of power consumptions;
• computing a second plurality of power consumptions;
• summing said first plurality of power consumptions to obtain a through-current power consumption;
• summing said second plurality of power consumptions to obtain a load capacitance power consumption;
• and
• summing said load capacitance power consumption and said through-current power consumption to obtain a total power consumption.

Apparatus for measuring power consumption of a logic device comprising:

• means for determining an input slew rate of an input signal to said logic device;
• means, responsive to said slew rate, for calculating a first power consumption resulting from a through-current of said logic device;
• means for calculating a second power consumption resulting from a charging current of said logic device;
• and
• means for summing said first power consumption and said second power consumption to provide a total power consumption of said logic device.

Apparatus for measuring power consumption of a logic device comprising:

• means for determining an input slew rate of an input signal to said logic device;
• first means, responsive to said slew rate, for calculating a first power consumption resulting from a through-current of said logic device;
• second means, responsive to said slew rate, for calculating a second power consumption resulting from said through-current of said logic device;
• third means for calculating a third power consumption resulting from a charging current of said logic device;
• and
• means, for summing said first power consumption, said second power consumption, and said third power consumption, to provide a total power consumption of said logic device.