Photolithography test structure
AssigneeAdvanced Micro Devices, Inc.
InventorsHoward S. Goad, Derick J. Wristers, James H. Hussey, Jr., Michael A. Hillis, William C. Chapman
Life of this patent
Estimating the term…
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AssigneeAdvanced Micro Devices, Inc.
InventorsHoward S. Goad, Derick J. Wristers, James H. Hussey, Jr., Michael A. Hillis, William C. Chapman
Estimating the term…
A photolithography test structure is provided for measuring the amount of notching associated with photolithography processing. The test structure includes a curved insulating structure placed in close spaced proximity with a conductive, interconnect structure. A pair of conductive pads are deposited at opposite ends of the interconnect structure for measuring the resistance through the interconnect. Depending upon the amount of notching associated with the interconnect, resistance readings will vary. Test areas containing notched interconnect can be compared with controlled areas specifically designed not to have notching in order to determine relative changes in resistance, and to correlate that resistance with notching magnitude. The insulating structure, interconnect structure and conductive pads are processed upon the same substrate material containing the resulting product requiring testing.
A photolithography test structure comprising:
An integrated circuit photolithography test structure formed by a method comprising the steps of:
Dependencies are inferred from the claim text.