Expanded microcomputer system for controlling radio frequency interference

#This invention relates in general to microcomputers, and more specifically to an expanded microcomputer system for providing radio frequency interference control.

#Microcomputers are widely used in paging receivers and a number of other radio frequency (RF) communication devices. Because, in recent years, paging receivers have begun to include a greater number of features, such as alphanumeric displays and real time clocks, complex circuitry has been added to support the additional operations. At the same time, however, paging receivers have become smaller. Therefore, the additional circuitry, which is sometimes very complex, is often integrated and included in microcomputers, resulting in larger, less efficient microcomputers which cannot be implemented in a cost effective manner.

#One approach to solving this problem is to use an expanded microcomputer system in which circuits including a processing unit, a random access memory (RAM), a read only memory (ROM), programmable elements, etc. are implemented on more than one chip. For instance, a first chip, e.g., a master microcomputer, can have included therein a central processing unit, memory, and various other processing elements, while a second chip, e.g., a slave microcomputer or other type of expansion chip, can be used to incorporate additional processing elements, such as expanded ROM. The two chips are inter-connected by a communication bus which allows two-way communication therebetween. This solution, however, is often not feasible for use in RF communication devices, such as paging receivers, because the communication bus often generates intense RF interference that interferes with the operation of the receiver. This interference is often so severe that information transmitted to the paging receiver can be erroneously received or entirely missed.

#FIG. 1 is an illustration of a conventional expanded microcomputer system in which a microcomputer is coupled to an expansion chip by a communication bus.

#FIG. 2 is an electrical block diagram of a radio receiver having a microcomputer coupled to an expansion chip by a communication bus in accordance with a preferred embodiment of the present invention.

#FIG. 3 is a timing diagram depicting the on-time of receiving circuitry included in the radio receiver of FIG. 2 and the timing of communications over the communication bus of FIG. 2 in accordance with the preferred embodiment of the present invention.

#FIG. 1 is an illustration of a conventional expanded microcomputer system included in a radio receiver or other radio frequency (RF) communication device. As shown, a microcomputer 10 comprises a central processing unit (CPU) 12 for controlling the operation of the radio receiver. The microcomputer 10 further comprises other conventional elements, such as timing elements 14, a random access memory (RAM) 16, a read only memory (ROM) 18, and an input/output (I/O) port 20 for providing signals to and receiving signals from peripheral circuitry, e.g., a receiver (not shown).

#In recent years, radio receivers have been designed to include a greater number of features, such as real-time clocks, alphanumeric displays, and silent (tactile) alerts, all of which require additional processing circuitry. The added processing circuitry often exceeds the amount of circuitry which can be economically added to a single chip microcomputer. As a result, an expansion chip 22, which may be, for example, a "slave" microcomputer is coupled to the microcomputer 10 via a communication bus 23, thereby forming an expanded microcomputer system. The expansion chip 22 comprises additional circuit elements, such as logic elements 24, additional RAM 26, additional ROM 28, and an EEPROM 30 (electrically erasable programmable read only memory). A bus interface 32, 34 included in each chip, i.e., the microcomputer 10 and the expansion chip 22, drives the communication bus 23 with data to be transmitted thereover. In this manner, the microcomputer 10 can easily access information stored in the expansion chip 22.

#The conventional expanded microcomputer system, which provides for communication between multiple chips, advantageously limits the size and therefore increases the efficiency of the microcomputer 10 controlling the radio receiver. However, a drawback to the use of a expanded microcomputer system is that communication over the bus 23 can interfere with the RF performance of the radio receiver. Because the communication between the two chips typically occurs at a high data rate, the rise and fall times of the data are relatively fast and, as a result, noise is generated which can desensitize the radio receiver. If the interference is intense enough, the RF performance of the radio receiver can be degraded to such an extent that information can be erroneously received or even missed.