Asynchronous interrupt inhibit method and apparatus for avoiding interrupt of an inseparable operation

A method for inhibiting an interrupt condition during the execution of a series of sequential instructions comprising:

• determining a number of instructions included in an inseparable operation;
• storing a value corresponding to said number of instructions in a fetch counter;
• executing said inseparable operation and decrementing said value stored in said fetch counter each time an instruction included in said inseparable operation is performed;
• and
• controlling activation and deactivation of said interrupt condition by maintaining an interrupt inhibit state while said inseparable operation is being executed until said value reaches a predetermined number.

An asynchronous interrupt inhibit apparatus for controlling activation and deactivation of an interrupt condition whereby a series of sequential instructions are interrupted, comprising:

• determining means for determining a value corresponding to a number of sequential instructions included in an inseparable operation;
• counter means for storing the determined value corresponding to the number of sequential instructions included in the inseparable operation;
• means for decrementing said value stored in said counter means each time an instruction included in said inseparable operation is executed;
• interrupting means for activating said interrupt condition during execution of said series of sequential instructions of said inseparable operation;
• and
• interrupt inhibiting control means for inhibiting activation of said interrupt conditions by said interrupting means during execution of said inseparable operation, and allowing activation of said interrupt condition only when said value reaches a predetermined number.

A method for inhibiting an interrupt condition during execution of a series of sequential instructions comprising:

• determining a number of sequential instructions included in an inseparable operation;
• storing a value corresponding to said number of sequential instructions in a fetch counter;
• executing said sequential instructions of the inseparable operation;
• decrementing said value stored in said fetch counter each time an instruction included in said inseparable operation is executed;
• and
• controlling activation and deactivation of said interrupt condition by maintaining an interrupt inhibit state while said inseparable operation is being executed, and allowing activation of said interrupt condition only when said value reaches a predetermined number.