Bus master arbitration circuitry having improved prioritization
AssigneeCompaq Computer Corporation
InventorsMaria L. Melo, Randy M. Bonella
Life of this patent
Estimating the term…
Loading patent…
AssigneeCompaq Computer Corporation
InventorsMaria L. Melo, Randy M. Bonella
Estimating the term…
An arbiter which allows retried requests to have high priority in subsequent arbitrations by not changing priority on a granted, but aborted, access to the bus and yet prevents the aborted requestor from thrashing the bus by masking its bus request signal until the data is available. Further, should an access to main memory be retried, all bus requests except the one from the memory system are masked to provide the memory system the highest effective priority to allow any flushing operations to occur. The masking of the various bus requests allows the arbiter to control access to a PCI standard bus without requiring that specific signals be added. The arbiter further includes modified priority LRU techniques and provides a locking requestor with an additional, highest priority position if retried.
A bus arbiter for a computer system, the computer system having a bus for connection to a plurality of bus masters and bus slaves, each bus master requesting control of the bus by use of a bus request signal and receiving control by use of a grant signal, wherein bus masters may request a lock on a bus slave by using a lock signal, wherein operation cycles of the bus masters can be directed to be retried by the bus slaves and wherein one of the bus slaves provides an indication when a retried cycle can proceed, the bus arbiter comprising:
A computer system, comprising:
A method for bus arbitration of a computer system, the computer system having a bus for connection to a plurality of bus masters and bus slaves, each bus master requesting control of the bus by use of a bus request signal and receiving control by use of a grant signal, wherein bus masters may request a lock on a bus slave by using a lock signal, wherein operation cycles of the bus masters can be directed to be retried by the bus slaves and wherein one of the slaves provides an indication when a retried cycle can proceed, the bus arbitration method comprising the steps of:
Dependencies are inferred from the claim text.