Sigma-delta converter having a digital logic gate core
AssigneeEchelon Corporation
InventorsPhilip H. Sutterlin, Walter J. Downey
Life of this patent
Estimating the term…
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AssigneeEchelon Corporation
InventorsPhilip H. Sutterlin, Walter J. Downey
Estimating the term…
A sigma-delta A/D converter having a digital logic gate core. The converter is comprised of a loop filter for shaping the converter's quantization noise spectrum. The loop filter is comprised of an unbuffered CMOS logic gate inverter which can be implemented by a gate array. A quantizer is coupled to the loop filter. A logic gate buffer is configured as a one-bit comparator, which is used to perform the quantization. This logic gate buffer can be one of the gates of a gate array. A sampler is coupled to the quantizer for sampling the quantized signal. This sampler can also be implemented by digital circuitry of a gate array. The signal from the sampler is fed into a decimator. The decimator outputs a digital signal representative of the amplitude of the analog signal.
An analog to digital converter circuit comprising:
A method for converting an analog signal to a digital signal representative of an amplitude of said analog signal, said method comprising the steps of:
An analog to digital converter circuit comprising:
An analog to digital converter circuit comprising:
An analog to digital converter circuit comprising:
An oversampled A/D converter comprising:
Dependencies are inferred from the claim text.