Methods and circuits for testing open collectors and open drains
AssigneeVLSI Technologies, Inc.
InventorWilliam C. Martin
Life of this patent
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AssigneeVLSI Technologies, Inc.
InventorWilliam C. Martin
Estimating the term…
The present invention is directed to methods and circuits for testing open collector or open drain output pads. In a preferred embodiment, the open collector or open drain outputs are hard driven to both their normal low and high level logic states during a test mode of operation. By actively driving open collector or open drain output pads to both their active and their inactive states, the existence of a stable output at any given sample time is guaranteed during a functionality test. The need to accurately estimate time delays associated with RC loads of external circuitry and the need to precisely strobe an open collector or open drain output following transition to an inactive, disabled state are therefore eliminated. Further, control signal inputs associated with a high impedance condition of open collector or open drain output pads can be directly examined at the circuit output using appropriate test logic.
Method of testing circuits having at least two output conditions during a non-test mode, a first of said output conditions being of higher impedance during the non-test mode than a second of said output conditions, in response to an output enable signal, said method comprising the steps of:
Method of testing circuits having at least two output conditions during normal non-test operation, one of said output conditions being used to drive a relatively high impedance condition, said method comprising the steps of:
Dependencies are inferred from the claim text.