Method of fabricating random access memory device having sidewall insulating layer on the laminate structure
AssigneeTexas Instruments Incorporated
InventorsToshiyuki Nagata, Hiroyuki Yoshida, Takayuki Niuya
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AssigneeTexas Instruments Incorporated
InventorsToshiyuki Nagata, Hiroyuki Yoshida, Takayuki Niuya
Estimating the term…
A semiconductor device in which a bit line (41), which is adhered to a contact hole (49) between polysilicon gate electrodes (35) and (36), is directly connected with an SiO.sub.2 film (53) having the same pattern on the gate electrodes; wherein an Si.sub.3 N.sub.4 layer (56) is buried outside the contact areas between the gate electrodes to approximately the same height as the SiO.sub.2 layer (53). The interlayer insulating film of the conventional memory cells array unit is no longer required, and it is not necessary to form contact holes in the interlayer insulating film. As a result, even if the gaps between the gates are designed to be small, there will be no short-circuiting between the bit line and word lines due to mask shifting, etc., making it possible to offer a highly integrated, highly reliable device.
A method of making a semiconductor device comprising:
Dependencies are inferred from the claim text.