Microprocessor with operation capture facility
AssigneeChips and Technologies, Inc.
InventorsJames S. Blomgren, Jimmy Bracking, David Richter, Francis Spahn
Life of this patent
Estimating the term…
Loading patent…
AssigneeChips and Technologies, Inc.
InventorsJames S. Blomgren, Jimmy Bracking, David Richter, Francis Spahn
Estimating the term…
The present invention provides a microprocessor with a special Operation Capture Facility (OCF) mechanism which enables "faulting" whenever there is (a) a memory access request to any one of a specified plurality of blocks of memory (b) a request to access any one of a plurality of specified I-O ports or (c) any one of a specified plurality of interrupts is activated. This OCF mechanism includes a plurality of special registers which store either (a) an I-O port address, (b) a memory address or (c) an interrupt number. Mask registers are provided which (1) mask bits in the special register, thereby providing the ability to fault on an entire block of I-O access requests or upon activation of any one of a block of interrupts and (2) indicate which type of interrupts should be faulted and to indicate whether I-O should be faulted on a byte, word or double word.
In a single chip integrated circuit microprocessor which executes instructions in sequence and which has a plurality of I-O ports, said ports being addressed by I-O instructions that include a port address, said microprocessor having a special operating mode, the improvement which comprises an operation capture facility that includes in combination:
In combination with a single chip integrated circuit microprocessor which has an instruction register, a memory address register, and a plurality of I-O ports, said ports being addressed by I-O instruction that places a port address in said memory address register,
Dependencies are inferred from the claim text.