US 5,442,320 AGranted

Mirror and bias circuit for class AB output stage with large swing and output drive

AssigneeNational Semiconductor Corporation

InventorsDavid J. Kunst, Stuart B. Shacter

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Abstract

A complementary transistor class AB output stage (200) utilizes a complementary pair of output drivers (220, 222) connected in series between the power supply rails (210, 216) to furnish the stage output. An output driver (206) is a composite pair of transistors in a Darlington configuration, which boosts the current gain and input resistance of the output stage. Bases of the output drivers are connected by a complementary pair of parallel connected drivers (226, 228), which function as common base level shifters. Quiescent bias of the output drivers is achieved by a pair of constant current transistors (232, 238) that are operated as complementary current mirrors. Inputs to the mirrors are relatively low current sink (252) and source (250) supplies. A level shifter and its corresponding current mirror are configured so that base currents flowing therein, which may be variable due to temperature and process variations, are generally shunted away from the current mirrors and toward an output driver to maintain mirrored currents and assist output drive.

Claims37

Dependent claims

A complementary transistor class AB output stage having a signal input terminal, a signal output terminal, a first reference power supply terminal and a second reference power supply terminal, the output stage comprising:

a Darlington output driver having an emitter terminal coupled to the first reference power supply terminal, a first collector terminal coupled to the second reference supply terminal, a second collector terminal coupled to the signal output terminal and a base terminal;
a complementary output driver complementary to the Darlington output driver having an emitter terminal coupled to the second reference power supply terminal, a collector terminal coupled to the signal output terminal and a base terminal;
a bias transistor having an emitter coupled to the Darlington output driver base terminal, a collector coupled to the complementary output driver base terminal, and a base coupled to a source of bias voltage operated at a potential between the potentials of the first and second reference power supply terminals about two V.sub.BE from the potential of the first reference power supply terminal;
a complementary bias transistor complementary to the bias transistor having an emitter coupled to the complementary output driver base terminal, a collector coupled to the Darlington output driver base terminal, and a base coupled to a source of bias voltage operated at a potential between the potentials of the first and second reference power supply terminals about two V.sub.BE from the potential of the second reference power supply terminal;
a constant current source coupled between the first reference power supply terminal and the Darlington output driver base terminal;
a complementary constant current source complementary to the constant current source coupled between the second reference power supply terminal and the complementary output driver base terminal;
and
a driver applying a signal from the signal input terminal to the base of one of the output drivers.

5 more elements

A complementary transistor class AB output stage having a signal input terminal, a signal output terminal, a positive power supply terminal and a negative power supply terminal, the output stage comprising:

a Darlington output driver;
a complementary output transistor complementary to the Darlington output driver coupled in series with the Darlington output driver between the positive and negative power supply terminals;
a complementary current source coupled to drive the output of the complementary output transistor;
and
a current mirror circuit coupled to the Darlington output driver including:
a current mirror transistor coupled between the positive and negative power supply terminals in series with a constant current generator,
a current source transistor forming a first current mirror with the current mirror transistor, the first current mirror forming a second current mirror with the Darlington output driver,
a bias transistor coupled to the Darlington output driver and coupled in series with the current source transistor,
a bias voltage source coupled in parallel with the coupled current source transistor and bias transistor operated at a potential about two V.sub.BE below the potential of the positive power supply terminal and coupling the bases of the current mirror circuit transistors to the base of the complementary output transistor to furnish additional current drive.

6 more elements

a Darlington output driver including:
an pnp output transistor having an emitter coupled to the positive power supply terminal, a collector coupled to the signal output terminal and a base,
an pnp transistor having an emitter coupled to the base of the pnp output transistor, a collector coupled to the negative power supply terminal and a base;
and
a bias resistor coupled between the emitter of the pnp transistor and the positive power supply terminal;
an npn output transistor having an emitter coupled to the negative power supply terminal, a collector coupled to the signal output terminal, and a base;
a current mirror including:
a current source transistor having an emitter coupled to the positive power supply terminal, a collector and a base,
a bias transistor having an emitter coupled to the collector of the current source transistor, a collector and a base,
a first diode drop transistor having an emitter coupled to the positive power supply terminal, a base and collector that are directly coupled and also coupled to the base of the current source transistor,
a second diode drop transistor having an emitter coupled to the collector of the first diode drop transistor, a collector coupled to the collector of the bias transistor, and a base coupled to the base of the bias transistor, and
a current mirror transistor having an emitter coupled to the positive power supply terminal, a base coupled to the base of the first diode drop transistor and a collector coupled to the base of the second diode drop transistor and also coupled to a current sink;
a level shift transistor having an emitter coupled to the collector of the current mirror current source transistor, a collector and base that are directly coupled and also coupled to the base of the Darlington output driver pnp transistor;
a complementary current mirror including:
an npn current sink transistor having an emitter coupled to the negative power supply terminal, a collector, and a base,
an npn bias transistor having an emitter coupled to the collector of the npn current sink transistor, a collector coupled to the collector of the level shift transistor, and a base,
an npn current mirror transistor having an emitter coupled to the negative power supply terminal, a collector and base that are directly coupled and also coupled to the base of the npn current sink transistor,
an npn diode drop transistor having an emitter coupled to the collector of the npn current mirror transistor, a base and collector that are directly coupled and also coupled to the base of the npn bias transistor and also coupled to a constant current source;
an pnp emitter follower transistor having an emitter coupled to the emitter of the level shift transistor, a collector coupled to the negative power supply terminal, and a base coupled to the signal input terminal.

16 more elements

a first Darlington output driver;
a second Darlington output driver complementary to and coupled in series with the first Darlington output driver between the positive and negative power supply terminals;
a complementary current source coupled to drive the output of the second Darlington output driver;
and
a current mirror circuit coupled to the first Darlington output driver including:
a current mirror transistor coupled between the positive and negative power supply terminals in series with a constant current generator,
a current source transistor forming a first current mirror with the current mirror transistor, the first current mirror forming a second current mirror with the first Darlington output driver,
a bias transistor coupled to the first Darlington output driver and coupled in series with the current source transistor,
a bias voltage source coupled in parallel with the coupled current source transistor and bias transistor operated at a potential about two V.sub.BE below the potential of the positive power supply terminal and furnishing additional current drive.

6 more elements

a first Darlington output driver;
a second Darlington output driver complementary to and coupled in series with the first Darlington output driver between the positive and negative power supply terminals;
a first current mirror circuit coupled to the first Darlington output driver including:
a first current mirror transistor,
a first constant current source transistor forming a first current mirror with the current mirror transistor, the first current mirror forming a second current mirror with the first Darlington output driver,
a first bias transistor coupled to the first Darlington output driver and coupled in series with the first constant current source transistor and having a base coupled to a source of bias voltage operated at about three V.sub.BE below the positive power supply terminal,
a first diode drop transistor having its collector directly coupled to its base,
a second diode drop transistor having its collector directly coupled to its base, the first current mirror transistor and the first and second diode drop transistors being coupled in series to develop the potential about three V.sub.BE below the positive power supply terminal;
and
a second current mirror circuit coupled to the second Darlington output driver including:
a second current mirror transistor,
a second constant current source transistor forming a third current mirror with the current mirror transistor, the third current mirror forming a fourth current mirror with the second Darlington output driver,
a second bias transistor coupled to the second Darlington output driver and coupled in series with the second constant current source transistor and having a base coupled to a source of bias voltage operated at about three V.sub.BE above the negative power supply terminal,
a third diode drop transistor having its collector directly coupled to its base,
a fourth diode drop transistor having its collector directly coupled to its base, the second current mirror transistor and the third and fourth diode drop transistors being coupled in series to develop the potential about three V.sub.BE above the negative power supply terminal.

12 more elements

Dependencies are inferred from the claim text.

Facts

Application: 08/257,587Filed 9 Jun 1994
Granted: 15 Aug 1995
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H03F 3/343
DC amplifiers in which all stages are DC-coupled: with semiconductor devices only
H03F 3/3066
Single-ended push-pull [SEPP] amplifiers ; Phase-splitters therefor: the collectors of complementary power transistors being connected to the output
H03F 3/45094
Long tailed pairs: folded cascode stages
H03F 2203/30057
Indexing scheme relating to single-ended push-pull [SEPP]; Phase-splitters therefor: the SEPP power transistors are realised as paralleled FETs,…