Read and/or write integrated circuit having an operation timing adjusting circuit and constant current elements

A read integrated circuit comprising:

• a differential amplifier circuit for amplifying a read-out signal;
• an operation timing adjusting circuit responsive to operation mode signals indicative of an operation mode of said read integrated circuit for outputting first, second and third control signals;
• a switching element responsive to said first control signal for supplying said differential amplifier circuit with a power supply voltage for setting said differential amplifier circuit in an operative state;
• a first constant current element, connected to a common emitter of said differential amplifier circuit and responsive to said second control signal to turn into operable state, said first element further turning into operative state, when said differential amplifier circuit is set into operative state in the operable state of said first constant current element, to cause a constant operating current to flow through said differential amplifier circuit;
• an emitter-follower output transistor responsive to an output signal of said differential amplifier circuit to turn into operative state to output said read-out signal amplified by said differential amplifier circuit;
• and
• second constant current elements, connected to the emitter of said emitter-follower output transistor and responsive to said third control signal to turn into operable state, said second constant current elements further turning into operative state, when said emitter-follower output transistor is set into operative state in the operable state of said second constant current elements, to cause a constant operating current to flow into said emitter-follower output transistor,
• wherein said operation timing adjusting circuit outputs said first, second and third control signals so as to set said first constant current element, said switching element and said second constant current element into operative state in this order when said operation mode signals instruct said differential amplifier circuit to start an amplification operation, and so as to set said second constant current elements, said switching element and said first constant current element into inoperative state in this order when said operation mode signals instruct said differential amplifier circuit to stop the amplification operation.