Programming method for the selective healing of over-erased cells on a flash erasable programmable read-only memory device

A method for programming an erasable programmable read-only memory device, the device comprising an array of cells, each cell having a control gate, a floating gate, a drain region, a source region, and a digit line coupled with the drain, said method comprising the following steps:

• a) erasing said array of programmable read-only memory cells;
• b) applying a control gate voltage to access a number of said control gates;
• c) applying a digit line voltage to access one of said digit lines, thereby activating said number of said cells;
• d) sensing said digit line voltage for a digit line voltage drop by applying 7.0 volts to said drain of said over-erased cell and 0.0 volts to said source of said over-erased cell, said digit line voltage drop indicating the presence of at least one over-erased activated cell;
• e) responsive to said digit line voltage drop, applying a sense voltage to each of said activated cells to determine which is over-erased;
• f) applying a heal voltage to said over-erased cell for an interval of time to store electrons on said floating gate of said over-erased cell;
• g) applying said sense voltage to said over-erased cell to determine if said over-erased cell remains over-erased;
• h) responsive to said over-erased cell remaining over-erased, repeating steps f) and g).

A method for programming a flash erasable programmable read-only memory device, the device comprising an array of cells, each cell having a control gate, a floating gate, a drain region, a source region, and a digit line coupled with the drain, said method comprising the following steps:

• a) erasing said array of programmable read-only memory cells;
• b) applying a control gate voltage to access eight of said control gates;
• c) applying a digit line voltage to access one of said digit lines, thereby activating eight of said cells;
• d) sensing said digit line voltage for a digit line voltage drop, said digit line voltage drop indicating the presence of at least one over-erased activated cell;
• e) responsive to said digit line voltage drop, applying a sense voltage to each of said activated cells to determine which is over-erased, said sense voltage including the application of 7.0 volts to said drain of said over-erased cell, 0.0 volts to said source of said over-erased cell, and allowing said control gate to float;
• f) applying a heal voltage to said over-erased cell for between one microsecond and one millisecond to store electrons on said floating gate of said over-erased cell, said heal voltage including the application of 5.0 volts to said drain and said control gate of said over-erased cell, and 0.0V to said source of said over-erased cell;
• g) applying said sense voltage to said over-erased cell to determine if said over-erased cell remains over-erased;
• h) responsive to said over-erased cell remaining over-erased, repeating steps f) and g).

A method for programming an erasable programmable read-only memory device, the device comprising an array of cells, each cell having a control gate, a floating gate, a drain region, a source region, and a digit line coupled with the drain, said method comprising the following steps:

• a) erasing said array of programmable read-only memory cells;
• b) accessing a number of said control gates;
• c) accessing one of said digit lines, thereby activating said number of said cells;
• d) sensing the presence of at least one over-erased activated cell;
• e) detecting which activated cell is over-erased;
• f) storing electrons on said floating gate of said over-erased cell by applying 5.0 volts to said drain and said control gate of said over-erased cell, and applying 0.0 volts to said source of said over-erased cell;
• g) determining whether said over-erased cell remains over-erased;
• h) responsive to said over-erased cell remaining over-erased, repeating steps f) and g).

A method for programming an erasable programmable read-only memory device, the device comprising an array of cells, each cell having a control gate, a floating gate, a drain region, a source region, and a digit line coupled with the drain, said method comprising the following steps:

• a) erasing said array of programmable read-only memory cells;
• b) applying a control gate voltage to access a number of said control gates;
• c) applying a digit line voltage to access one of said digit lines, thereby activating said number of said cells;
• d) sensing said digit line voltage for a digit line voltage drop, said digit line voltage drop indicating the presence of at least one over-erased activated cell;
• e) responsive to said digit line voltage drop, applying a sense voltage to each of said activated cells to determine which is over-erased;
• f) applying a heal voltage to said over-erased cell for an interval of time to store electrons on said floating gate of said over-erased cell, wherein said heal voltage comprises applying 5.0 volts to said drain and said control gate of said over-erased cell, and applying 0.0 volts to said source of said over-erased cell;
• g) applying said sense voltage to said over-erased cell to determine if said over-erased cell remains over-erased;
• h) responsive to said over-erased cell remaining over-erased, repeating steps f) and g).