Structure and method for packing and unpacking a stream of N-bit data to and from a stream of N-bit data words
AssigneeC-Cube Microsystems, Inc.
InventorToshiaki Mizukami
Life of this patent
Estimating the term…
Abstract
A structure and a method capable of both packing data into and unpacking data from either the little endian or the big endian format are provided. Under the structure and method of the present invention, the packed or unpacked data, as the case may be, is only shifted in one direction. During a packing operation, a stream of n-bit data is packed into a stream of m-bit words. During an unpacking operation, a stream of m-bit packed data is unpacked into a stream of n-bit words. n.ltoreq.m.
Claims20
A structure for packing a stream of n-bit data into a stream of m-bit data words (n.ltoreq.m) for both little endian and big endian formats, comprising:
- a 2m-bit register for holding up to 2m bits of packed data;
- means for shifting in one direction only each of said n-bit data into position for insertion into said 2m-bit register as said packed data, said shifting means shifting each of said n-bit data, under said little endian format, a number of bits equalling the number of bits (modulo m) of said packed data in said 2m-bit register before said insertion, and under said big endian format, a number of bits equalling 2m minus both said number of bits (modulo m) of packed data and n;
- and
- means for transferring from said 2m-bit register an m-bit output datum whenever the number of bits of said packed data in said 2m-bit register exceeds m.
A structure for unpacking a stream of n-bit data from a stream of m-bit data words for both little endian and big endian formats, comprising:
- a 2m-bit register for holding as packed data up to two of said m-bit data words at a time;
- means for shifting in one direction only content of said 2m-bit register, for extraction from predetermined bit positions each of said n-bit data, said shifting means shifting said content of said 2m-bit register, under said little endian format, a number of bits equalling the number of bits (modulo m) of said packed data remaining in said 2m-bit register before said extraction, and under said big endian format, a number of bits equalling 2m minus both said number of bits (modulo m) of packed data and n;
- means for transferring into said 2m-bit register an m-bit input datum as said packed data whenever the number of bits of said packed data in said 2m-bit register is less than m.
A method for packing a stream of n-bit data into a stream of m-bit words for both little endian and big endian formats, comprising the steps:
- providing a 2m-bit register for holding up to 2m bits of packed data;
- and
- repeating in order the steps of:
- (i) shifting in a one direction-only shifter each of said n-bit data into position for insertion into said 2m-bit register as said packed data, said shifting step shifting each of said n-bit data, under said little endian format, a number of bits equalling the number of bits (modulo m) of said packed data in said 2m-bit register before said insertion, and under said big endian format, a number of bits equalling 2m minus both said number of bits (modulo m) of said packed data and n;
- and
- (ii) transferring from said 2m-bit register an m-bit output datum whenever the number of bits of packed data in said 2m-bit register exceeds m.
A method for unpacking a stream of n-bit data from a stream of m-bit data words (n.ltoreq.m) for both little endian and big endian formats, comprising the steps of:
- providing a 2m-bit register for holding as packed data up to two of said m-bit data words at a time;
- and
- repeating in order the steps of:
- (i) transferring into said 2m-bit register an m-bit input datum as said packed data whenever the number of bits of packed data in said 2m-bit register is less than m;
- and
- (ii) shifting in a one direction-only shifter content of said 2m-bit register, for extraction from predetermined bit positions each of said n-bit data, said shifting step shifting said content of said 2m-bit register, under said little endian format, a number of bits equalling the number of bits (modulo m) of said packed data remaining in said 2m-bit register before said extraction, and under said big endian format, a number of bits equalling 2m minus both said number of bits (modulo m) of said packed data and n.
Dependencies are inferred from the claim text.