Method and apparatus for testing of integrated circuit chips

A method of testing an integrated circuit semi-conductor chip, said chip having a first plurality of I/O, power, and ground contacts, said method comprising the steps of:

• a. providing an integrated circuit chip test system comprising:
• (1). a burn in board tester having
• i. a second plurality of contacts corresponding to said first plurality of contacts, said second plurality of contacts having high surface area conductor surfaces;
• said conductor surfaces being columnar dendrites comprising columnar Pd atop a Pd film, and having a height of about 10 to 100 microns and a density of about 200 to 500 dendrites per square millimeter;
• and
• ii. signal line means for supplying test signals to said second plurality of contacts;
• (2). means for placing the integrated circuit semiconductor chip on the burn in board tester, applying a compressive force to the integrated circuit semiconductor chip, and removing the integrated circuit semiconductor ship from the burn in board at the conclusion of the test;
• and
• (3). heating means for heating semi-conductor chips under test;
• b. bringing the first plurality of contacts of the semi-conductor chip into electrically conductive contact with the second plurality of contacts on the chip test fixture system;
• c. applying a compressive force to the chip to provide low impedance contact between the first plurality of contacts on the integrated circuit semiconductor chip and the second plurality of contacts on the burn in board tester;
• d. passing test signal input vectors to the semiconductor chip and receiving test signal output vectors from the semiconductor chip;
• and
• e. applying a vacuum to the surface of the integrated circuit semiconductor chip remote from the burn in board tester and a positive pressure between the burn in board tester and the integrated circuit semiconductor chip to remove the integrated circuit semiconductor chip from the burn in board tester;
• and
• f. separating chips that have passed from chips that have failed.