Apparatus for synchronizing a plurality of clocks in a simulcast network to a reference clock

A simulcast network comprising:

• (a) a plurality of radio transmitters for broadcasting radio signals at a carrier frequency, each transmitter including a carrier frequency control circuit for establishing said carrier frequency of each said transmitter, wherein said carrier frequency control circuit establishes said carrier frequency based on a clocking signal;
• and
• (b) a plurality of clocks, wherein each one of said plurality of clocks is associated with a corresponding transmitter of said plurality of radio transmitters, each clock including:
• (i) a sequentially advanceable counter for maintaining a time value in response to said clocking signal;
• (ii) a signal generator for producing said clocking signal for application to said carrier frequency control unit and said sequentially advanceable counter;
• and
• (iii) a time value processing circuit connected to said sequentially advanceable counter for producing a clock time based on said time value;
• wherein at least two of said signal generators associated with at least two of said clocks produce different clocking signals so that said sequentially advanceable counters associated therewith advance at different rates and so that said transmitters associated therewith broadcast at different carrier frequencies;
• and
• wherein said time value processing circuits associated with said at least two of said signal generators are configured to produce clock times that are substantially identical to each other.

A simulcast network synchronized to a reference clock, said reference clock transmitting a reference time signal, said simulcast network broadcasting a data signal substantially simultaneously, said simulcast network comprising:

• (a) a plurality of transmitters spaced apart over a geographic area;
• and
• (b) a plurality of clocks, each one of said clocks associated with one of said plurality of transmitters, wherein each one of said clocks includes:
• (i) a sequentially advanceable counter that maintains a clock time in response to a periodic clocking signal and provides a clock time signal corresponding to the clock time;
• (ii) a difference calculating circuit including a first receiving circuit for receiving the reference time signal, said reference time signal indicating a reference time, and a second receiving circuit for receiving said clock time signal, said difference calculating circuit determining a time difference factor as a function of a difference between said reference time and said clock time and transmitting said time difference factor to a clock synchronization circuit, said clock synchronization circuit directing said sequentially advanceable counter to indicate a new clock time when said time difference factor is received;
• and
• (iii) a time counter controller having a counter advance circuit connected to said sequentially advanceable counter for generating said periodic clocking signal, said clock synchronization circuit being connected to said counter advance circuit and when said time difference factor is received said clock synchronization circuit selectively directing said counter advance circuit to change the frequency of said clocking signal;
• whereby said plurality of clocks synchronize their respective clock time signals to said reference time signal and said transmitters broadcast said data signal at substantially the same time and further wherein said clock synchronization circuits of at least two clocks are configured so as to cause said counter advance circuits associated therewith to generate clocking signals that are different from each other, so as to cause said counters to advance at different rates, and said clock synchronization circuits of said at least two clocks are configured to selectively adjust said sequentially adjustable counters associated therewith so that said clock time signals are modified so as to at least periodically be substantially identical to each other.