Ring oscillator and pulse phase difference encoding circuit

A pulse phase difference encoding circuit comprising:

• a ring oscillator for circulating pulse edges of two types therein which comprises an even number of inverting circuits connected in a ring, wherein each of the inverting circuits is operative to invert an input signal and output an inversion of the input signal;
• wherein one of the inverting circuits comprises a first start inverting circuit which starts an operation of inverting an input signal in response to a first control signal applied from an external input;
• wherein one of the inverting circuits except the first start inverting circuit and an inverting circuit following the first start inverting circuit comprises a second start inverting circuit which starts an operation of inverting an input signal in response to a second control signal;
• and control signal inputting means for inputting the second control signal to the second start inverting circuit during an interval from a first moment at which the first control signal is inputted into the first start inverting circuit and the first start inverting circuit starts the inverting operation to a second moment at which a pulse edge initially generated by the start of the inverting operation of the first start inverting circuit and travelling while being sequentially inverted by the inverting circuits enters the second start inverting circuit;
• means for inputting a first input signal into the first start inverting circuit from an external input as the first control signal;
• output terminals for outputting output signals of the inverting circuits in the ring oscillator respectively;
• counting means receiving an output signal from a given output terminal of said output terminals for counting a number of times a pulse edge initially generated by the start of the inverting operation of the first start inverting circuit circulates in the ring oscillator during an interval from a moment of the start of the inverting operation of the first start inverting circuit in response to the first input signal to a moment at which a second input signal is inputted, and for outputting a digital signal representing said count number;
• pulse edge detecting means receiving the output signals from the output terminals for detecting which of the inverting circuits the pulse edge initially generated by the start of the inverting operation of the first start inverting circuit reaches when the second input signal is inputted;
• and
• an encoder for outputting a number of inverting circuits from the first start inverting circuit to the inverting circuit detected by the pulse edge detecting means as a digital signal;
• wherein a final digital signal is outputted as an indication of a phase difference between the first input signal and the second input signal, and the final digital signal has higher bits composed of the digital signal from the counting means and lower bits composed of the digital signal from the encoder.

A ring oscillator comprising:

• an even number of inverting circuits connected in a first ring, wherein each of the inverting circuits is operative to invert an input signal and output an inversion of the input signal;
• wherein one of the inverting circuits comprises a first start inverting circuit which starts an operation of inverting an input signal in response to a first control signal applied from an external input;
• wherein one of the inverting circuits except the first start inverting circuit comprises a second start inverting circuit which starts an operation of inverting an input signal in response to a second control signal;
• and
• an odd number of inverting circuits including the second start inverting circuit and being connected in a second ring, wherein an output signal of one of the inverting circuits in the second ring is used as the second control signal.

An oscillator comprising:

• a predetermined even number of inverting circuits connected in a loop and each being able to output an output signal having a predetermined inversion relation with an input ,signal thereto;
• means for selectively breaking and enabling the predetermined inversion relation between the input signal and the output signal to and from a first one of the inverting circuits in response to an externally applied signal;
• and
• means for selectively breaking and enabling the predetermined inversion relation between the input signal and the output signal to and from a second one of the inverting circuits in response to the output signal of one of the inverting circuits except the second one in the loop.