Method for time delaying a signal and corresponding delay circuit
AssigneeFrancen Telecom
InventorJean L. Rainard
Life of this patent
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Abstract
The variable and controllable delay circuit having a signal input (1), a control input (3) for a control signal, a signal output (2) for delivering a signal which is time delayed with respect to the input signal (SE), and delay means including a logic circuit (4) connected between the signal input and the signal output, as well as a load circuit including a capacitive load (10) connected at the output (9) of the logic circuit (4); the impedance of the load circuit is alterable under the action of the control signal in order to vary the said delay. The capacitive load (10) is variable under the action of the control signal (b3, b2, b1) to take different capacitive values.
Claims12
A method for time delaying a signal with a variable and controllable delay, comprising:
- connecting a capacitive load of a load circuit to the output of a logic circuit that is able to receive the signal as input and to deliver a delayed signal as output;
- altering the impedance of the load circuit in order to vary the delay, the impedance of the load circuit being altered by altering an intrinsic capacitive value of the capacitive load so as to confer on the capacitive load discrete values taken from among a predetermined set of values;
- and
- controlling directly the alteration of the values of the capacitive load by at least one digital word, wherein the different values of the capacitive load corresponds to different values of the at least one digital control word.
A variable and controllable delay circuit, comprising:
- a signal input;
- a control input for a control signal;
- a signal output for delivering a signal which is time delayed with respect to the input signal;
- and
- a delay structure comprising a logic circuit connected between the signal input and the signal output and a load circuit including a capacitive load connected to the output of the logic circuit, an impedance of the load circuit being alterable under the action of the control signal in order to vary the delay, wherein the control signal includes at least one digital word, and the capacitive load is under the action of the control signal, able to take different discrete capacitive values that correspond directly to different values of the digital control word.
Dependencies are inferred from the claim text.