Character/pattern generator and information processing system

In an information processing system having, at least, a character/pattern generator wherein at least either items of characters and patterns are to be processed, and wherein bit map data expressing any of the items in a dot form is generated from vector data which is outline information expressing an outline of the item in a vector form and is delivered as an output, a central processing unit which executes information processing, a coordinate transformation execution unit and at least one sort of output engine;

• an information processing system wherein:
• said coordinate transformation execution unit includes:
• a first register file in which coordinate values to be coordinate-transformed are stored;
• a second register file in which coordinate transformation parameters are stored;
• a multiplier which multiplies the coordinate value stored in said first register file and the corresponding coordinate transformation parameter stored in said second register file;
• a first latch circuit and a second latch circuit in which multiplication results of said multiplier are accumulated;
• an adder/subtracter which executes a first addition/subtraction between the content of said first latch circuit and that of said second latch circuit, and a second addition/subtraction between a last addition/subtraction result and the corresponding coordinate transformation parameter stored in said second register file;
• selectors which select either of said first addition/subtraction and said second addition/subtraction so as to execute the selected addition/subtraction by means of said adder/subtracter;
• a third latch circuit which stores a result of said addition/subtraction of said adder/subtracter;
• and
• local buses which connect the aforementioned constituents;
• said character/pattern generator comprises:
• coordinate transformation means for coordinate-transforming said vector data;
• memory means for storing coordinate transformation parameters dictating a coordinate transforming operation of the coordinate transformation means;
• means for accepting a designation of said output engine to-be-used;
• and
• bit map data generation means for generating said bit map data of said dot form from the vector data coordinate-transformed by said coordinate transformation means;
• and
• said central processor unit comprises:
• coordinate transformation parameter bestowal means for communicating said coordinate transformation means coordinate transformation parameters which correspond to an address allocation of said output engine to-be-used to the memory means of the character/pattern generator.

In an information processing system having, at least, a character/pattern generator wherein at least either items of characters and patterns are to be processed, and wherein bit map data expressing any of the items in a dot form is generated from vector data which is outline information expressing an outline of the item in a vector form and is delivered as an output, a central processing unit which executes information processing, a coordinate transformation execution unit and at least one sort of output engine;

• an information processing system wherein:
• said character/pattern generator comprises:
• coordinate transformation means for coordinate transforming said vector data;
• bit map data generation means for generating said bit map data of said dot form from the vector data coordinate transformed by said coordinate transformation means;
• memory means for storing therein said bit map data generated by the dot data generation means;
• a coordinate transformation circuit which coordinate-transforms said vector data;
• and
• transfer means for externally transferring said bit map data stored in said memory means;
• said central processor unit comprises:
• a function of causing said bit map data generation means to generate bit map data items from respective vector data items in two or more divided subregions of a region of said vector data which has been divided in generating the bit map data in order to generate the bit map data having a size larger than a storage capacity of said memory means;
• said coordinate transformation execution unit includes:
• a first register file in which coordinate values to be coordinate-transformed are stored;
• a second register file in which coordinate transformation parameters are stored;
• a multiplier which multiplies the coordinate value stored in said first register file and the corresponding coordinate transformation parameter stored in said second register file;
• a first latch circuit and a second latch circuit in which multiplication results of said multiplier are accumulated;
• an adder/subtracter which executes a first addition/subtraction between the content of said first latch circuit and that of said second latch circuit, and a second addition/subtraction between a last addition/subtraction result and the corresponding coordinate transformation parameter stored in said second register file;
• selectors which select either of said first addition/subtraction and said second addition/subtraction so as to execute the selected addition/subtraction by means of said adder/subtracter;
• a third latch circuit which stores a result of said addition/subtraction of said adder/subtracter;
• and
• local buses which connect the aforementioned constituents;
• and
• said function of said central processor unit for said bit map data generation includes:
• regional division means for performing either of two sorts of regional divisions;
• a regional division in which said region of said vector data is divided in a horizontal direction in data transfer unit of said transfer means, and a regional division in which said region of said vector data is divided in a vertical direction;
• and
• regional division selection means for selecting either of said two sorts of regional divisions in correspondence with an address allocation of said output engine to-be-used.

In a character/pattern generator wherein at least either items of characters and patterns are to be processed, and wherein bit map data expressing any of the items in a dot form is generated from vector data which is outline information expressing an outline of the item in a vector form and is delivered as an output;

• a character/pattern generator comprising:
• coordinate transformation means for coordinate transforming said vector data;
• bit map data generation means for generating said bit map data of said dot form from the vector data coordinate transformed by said coordinate transformation means;
• memory means for storing therein said bit map data generated by the dot data generation means;
• and
• transfer means for externally transferring said bit map data stored in said memory means;
• a coordinate transformation execution unit including:
• a first register file in which coordinate values to be coordinate-transformed are stored;
• a second register file in which coordinate transformation parameters are stored;
• a multiplier which multiplies the coordinate value stored in said first register file and the corresponding coordinate transformation parameter stored in said second register file;
• a first latch circuit and a second latch circuit in which multiplication results of said multiplier are accumulated;
• an adder/subtracter which executes a first addition/subtraction between the content of said first latch circuit and that of said second latch circuit, and a second addition/subtraction between a last addition/subtraction result and the corresponding coordinate transformation parameter stored in said second register file;
• selectors which select either of said first addition/subtraction and said second addition/subtraction so as to execute the selected addition/subtraction by means of said adder/subtracter;
• a third latch circuit which stores a result of said addition/subtraction of said adder/subtracter;
• and
• local buses which connect the aforementioned constituents;
• said transfer means including:
• an address update function of updating addresses in conformity with any of at least two address update schemes in transferring said bit map data stored in said memory means;
• and
• an address update selection function of selecting any of said at least two sorts of address update schemes on the basis of information received from an associated processor unit.

In an information processing system having, at least, a character/pattern generator wherein at least either items of characters and patterns are to be processed, and wherein bit map data expressing any of the items in a dot form is generated from vector data which is outline information expressing an outline of the item in a vector form and is delivered as an output, a central processing unit which executes information processing, an external memory, and at least one sort of output engine;

• an information processing system wherein:
• said character/pattern generator comprises:
• coordinate transformation means for coordinate-transforming said vector data;
• bit map data generation means for generating said bit map data of said dot form from the vector data coordinate-transformed by said coordinate transformation means;
• memory means for storing therein said bit map data generated by the dot data generation means;
• and
• transfer means for transferring said bit map data stored in said memory means, to said external memory;
• and
• said central processor unit includes a transfer control function of transferring the bit map data stored in said external memory, to said output engine to-be-used;
• said coordinate transformation means includes a coordinate transform execution unit including:
• a first register file in which coordinate values to be coordinate-transformed are Stored;
• a second register file in which coordinate transformation parameters are stored;
• a multiplier which multiplies the coordinate value stored in said first register file and the corresponding coordinate transformation parameter stored in said second register file;
• a first latch circuit and a second latch circuit in which multiplication results of said multiplier are accumulated;
• an adder/subtracter which executes a first addition/subtraction between the content of said first latch circuit and that of said second latch circuit, and a second addition/subtraction between a last addition/subtraction result and the corresponding coordinate transformation parameter stored in said second register file;
• selectors which select either of said first addition/subtraction and said second addition/subtraction so as to execute the selected addition/subtraction by means of said adder/subtracter;
• a third latch circuit which stores a result of said addition/subtraction of said adder/subtracter;
• and
• local buses which connect the aforementioned constituents;
• said transfer control function including an address update function of executing any of a plurality of sorts of address update schemes in transferring said bit map data stored in said external memory, to said output engine, and an address update selection function of selecting any of said plurality of sorts of address update schemes in accordance with an address allocation of said output engine to-be-used.

In a character/pattern generator wherein at least either items of characters and patterns are to be processed, and wherein bit map data expressing any of the items in a dot form is generated from vector data which is outline information expressing an outline of the item in a vector form and is delivered as an output, information processing system comprising:

• a character/pattern generator comprising:
• coordinate transformation means for coordinate-transforming said vector data;
• bit map data generation means for generating said bit map data of said dot form from the vector data coordinate transformed by said coordinate transformation means;
• said coordinate transformation means including,
• means for subjecting said vector data to any of at least two sorts of coordinate transformations by the use of coordinate transformation parameters externally given from an associated processor unit,
• means for selecting any of said at least two sorts of coordinate transformations on the basis of information externally given,
• a coordinate transformation mode register in which a value for designating a coordinate transformation method is set from an associated processor unit,
• a coordinate transformation execution unit which executes coordinate transformation calculations in conformity with the designated coordinate transformation method, and
• a coordinate transformation controller which controls the operation of said coordinate transformation circuit;
• and
• memory means for storing the coordinate transformation parameters received from the associated processor unit;
• a central processor unit including information bestowal means for giving said character/pattern generator the information which corresponds to an address allocation of said output engine to-be-used;
• said coordinate transformation selection function selecting any of said at least two sorts of coordinate transformations on the basis of said information given by said information bestowal means;
• means for accepting a designation of said output engine to-be-used;
• and
• coordinate transformation execution unit including,
• a first register file in which coordinate values to be coordinate-transformed are stored,
• a second register file in which coordinate transformation parameters are stored,
• a multiplier which multiplies the coordinate value stored in said first register file and the corresponding coordinate transformation parameter stored in said second register file,
• a first latch circuit and a second latch circuit in which multiplication results of said multiplier are accumulated,
• an adder/subtracter which executes a first addition/subtraction between the content of said first latch circuit and that of said second latch circuit, and a second addition/subtraction between a last addition/subtraction result and the corresponding coordinate transformation parameter stored in said second register file,
• selectors which select either of said first addition/subtraction and said second addition/subtraction so as to execute the selected addition/subtraction by means of said adder/subtracter,
• a third latch circuit which stores a result of said addition/subtraction of said adder/subtracter, and
• local buses which connect the aforementioned constituents.