Packet switching system for forwarding packets from input buffers using idle/busy status of output buffers
AssigneeNEC Corporation
InventorRuixue Fan
Life of this patent
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AssigneeNEC Corporation
InventorRuixue Fan
Estimating the term…
A packet switching system comprises input buffers and output buffers, and a self-routing network for routing packets from the input buffers to the output buffers according to the routing information contained in their header. An input controller, associated with each input buffer, includes an idle/busy memory. An output controller associated with each output buffer, detects the idle space of the associated output buffer and determines if the idle space is greater than a predetermined value. If the idle space is determined to be greater than the predetermined value, an idle status bit is generated and if the idle space is determined to be smaller than the predetermined value, a busy status bit is generated. The idle and busy status bits are broadcast to the idle/busy memory of all input controllers. Each input controller writes an incoming packet into the associated input buffer and reads it onto the self-routing network if an idle status bit is stored in the idle/busy memory corresponding to the routing information of the incoming packet.
A packet switching system comprising:
A packet switching system comprising:
A packet switching system comprising:
A packet switching system comprising:
Dependencies are inferred from the claim text.