Enhanced integrated waveshaping circuit

A method for waveshaping an output data signal and a complementary output data signal, the method comprising the steps of:

• generating a phase-adjusted input signal by fixing a phase relationship between an externally-generated input signal and an externally-generated oscillator signal;
• generating a phase-adjusted delayed input signal by fixing a phase relationship between an externally-generated delayed input signal and the externally-generated oscillator signal;
• generating a plurality of pairs of logic signals, each pair of logic signals changing to a first pair of logic states in response to one of the edges of the oscillator signal that follows the leading edge of the phase-adjusted input signal, and changing to a second pair of logic states in response to one of the edges of the oscillator signal that follows the trailing edge of the phase-adjusted input signal;
• generating a plurality of pairs of delayed logic signals, each pair of delayed logic signals changing to a first pair of logic states in response to one of the edges of the oscillator signal that follows the leading edge of the phase-adjusted delayed input signal, and changing to a second pair of logic states in response to one of the edges of the oscillator signal that follows the trailing edge of the phase-adjusted delayed input signal, each pair of delayed logic signals corresponding to one pair of logic signals;
• and
• generating an output data signal and a complementary output data signal in response to the logic states of both the plurality of pairs of logic signals and the plurality of pairs of delayed logic signals, the logic states of each pair of logic signals and its corresponding pair of delayed logic signals simultaneously generating both an incremental portion of the output data signal and an incremental portion of the complementary output data signal so that an instantaneous value of the output data signal is determined by summing together the incremental portions of the output data signal, and so that an instantaneous value of the complementary output data signal is determined by summing together the incremental portions of the complementary output data signal.

A waveshaping circuit for generating

• complementary output data signals, the waveshaping circuit comprising:
• a frame alignment circuit that generates a phase-adjusted input signal by fixing a phase relationship between an externally-generated input signal and an externally-generated oscillator signal;
• a delayed frame alignment circuit that generates a phase-adjusted delayed input signal by fixing a phase relationship between an externally-generated delayed input signal and the externally-generated oscillator signal;
• a first input logic stage that generates a plurality of pairs of first logic signals, each pair of first logic signals changing to a first pair of logic states in response to one of the edges of the oscillator signal that follows the leading edge of the phase-adjusted input signal, and changing to a second pair of logic states in response to one of the edges of the oscillator signal that follows the trailing edge of the phase-adjusted input signal;
• a second input logic stage that generates a plurality of pairs of second logic signals, each pair of second logic signals changing to a first pair of logic states in response to one of the edges of a delayed oscillator signal that follows the leading edge of the phase-adjusted input signal, and changing to a second pair of logic states in response to one of the edges of the delayed oscillator signal that follows the trailing edge of the phase-adjusted input signal;
• a first delayed input logic stage that generates a plurality of pairs of first delayed logic signals, each pair of first delayed logic signals changing to a first pair of logic states in response to one of the edges of the oscillator signal that follows the leading edge of the phase-adjusted delayed input signal, and changing to a second pair of logic states in response to one of the edges of the oscillator signal that follows the trailing edge of the phase-adjusted delayed input signal, each pair of first delayed logic signals corresponding to one pair of first logic signals;
• a second delayed input logic stage that generates a plurality of pairs of second delayed logic signals, each pair of second delayed logic signals changing to a first pair of logic states in response to one of the edges of a delayed oscillator signal that follows the leading edge of the phase-adjusted delayed input signal, and changing to a second pair of logic states in response to one of the edges of the delayed oscillator signal that follows the trailing edge of the phase-adjusted delayed input signal, each pair of second delayed logic signals corresponding to one pair of second logic signals;
• and
• a weighted current sum stage that generates an output data signal and a complementary output data signal in response to the logic states of the plurality of pairs of first logic signals, the plurality of pairs of second logic signals, the plurality of pairs of first delayed logic signals, and the plurality of pairs of second delayed logic signals, the logic states of each pair of first logic signals and its corresponding pair of first delayed logic signals, and the logic states of each pair of second logic signals and its corresponding pair of second delayed logic signals simultaneously generating both an incremental portion of the output data signal and an incremental portion of the complementary output data signal so that an instantaneous value of the output data signal is determined by summing together the incremental portions of the output data signal, and so that an instantaneous value of the complementary output data signal is determined by summing together the incremental portions of the complementary output data signal.