High efficiency multi-junction solar cell

A high efficiency three-junction solar cell comprising:

• (a) a bottom semiconductor cell comprising a p-germanium substrate having a front surface and a back surface;
• (b) a back-metal contact on said back surface of said germanium substrate;
• (c) a first semiconductor cell comprising (1) a GaAs n-p junction formed from a p-GaAs and an n-GaAs layer, said p-GaAs layer formed on said front surface of said p-germanium substrate, and (2) an n-(Al,Ga)As window layer, said n-(Al,Ga)As window layer formed on said n-GaAs layer;
• (d) a tunnel diode comprising a GaAs n.sup.+ -p.sup.+ junction formed from an n.sup.+ -GaAs layer and a p.sup.+ -GaAs layer, said n.sup.+ -GaAs layer formed on said n-(Al,Ga)As contact layer;
• (e) a second semiconductor cell comprising (1) a (Ga,In)P n-p junction formed from a p-(Ga,In)P layer and an n-(Ga,In)P layer, said p-(Ga,In)P layer formed on said p.sup.+ -GaAs layer of said tunnel diode and said n-(Ga,In)P layer formed on said p-(Ga,In)P layer, (2) an n-(Al,In)P layer formed on said n-(Ga,In)P layer, (3) metal grid lines contacting said n-(Al,In)P layer, and (4) at least one anti-reflection coating layer covering said n-(Al,In)P layer.

A high-efficiency two-junction solar cell comprising:

• (a) an n-germanium substrate having a front surface and a back surface, said front surface being passivated;
• (b) a back-metal contact on said back surface of said germanium substrate;
• (c) a first semiconductor cell comprising (1) a GaAs p-n junction formed from an n-GaAs layer and a p-GaAs layer, said n-GaAs layer formed on said front surface of said n-germanium substrate, and (2) a p-(Al,Ga)As window layer, said p-(Al,Ga)As window layer formed on said p-GaAs layer;
• (d) a tunnel diode comprising a GaAs p.sup.+ -n.sup.+ junction formed from a p.sup.+ -GaAs layer and an n.sup.+ -GaAs layer, said p.sup.+ -GaAs layer formed on said p-(Al,Ga)As contact layer;
• (e) a second semiconductor cell comprising (1) a (Ga,In)P p-n junction formed from an n-(Ga,In)P layer and a p-(Ga,In)P layer, said n-(Ga,In)P layer formed on said n.sup.+ -GaAs layer of said tunnel diode and said p-(Ga,In)P layer formed on said n-(Ga,In)P layer, (2) a p-(Al,In)P layer formed on said p-(Ga,In)P layer, (3) metal grid lines contacting said p-(Al,In)P layer, and (4) at least one anti-reflection coating layer covering said p-(Al,In)P layer.