Parallel process interposer (PPI)
AssigneeInternational Business Machines Corporation
InventorsRichard B. Booth, Robert H. Gephard, Bradley S. Gremban, Janet E. Poetzinger, David T. Shen
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AssigneeInternational Business Machines Corporation
InventorsRichard B. Booth, Robert H. Gephard, Bradley S. Gremban, Janet E. Poetzinger, David T. Shen
Estimating the term…
A multilayer, high yield and high density integrated circuit (IC) chips interposer and the method of manufacture therefore. A thin polyimide film is circuitized with copper on both sides. One side may be reserved for power or ground with the opposite side being a signal plane. Adhesive is laminated over both sides covering the circuit patterns. Vias are drilled through at least one adhesive surface, and through the polyimide film. Metal (copper) is blanket sputtered to coat the via walls. Polymer Metal Conductive (PMC) paste is screened to at least partially fill the vias. The Blanket metal is sub-etched using the screened PMC as a mask. Layers are stacked to form the interposer with the PMC bonding the stacked layers together and electrically interconnecting between layers.
An integrated circuit chip interposer having a plurality of interposer layers comprised of:
An integrated circuit chip package comprised of:
Dependencies are inferred from the claim text.