Multimedia controller

A multimedia controller apparatus comprising:

• a digital circuit means for digitally volume controlling a plurality of analog input signals;
• including
• a left channel digital circuit receiving left channel input signals and producing a left channel combined signal;
• a right channel digital circuit receiving right channel input signals and producing a right channel combined signal;
• and
• a mono digital circuit receiving mono input signals and producing a mono combined signal;
• wherein each of said left channel digital circuit, said right channel digital circuit and said mono digital circuit comprise:
• a time multiplexed gate to sequentially permit passage of time sequenced discrete segments of each of said input signals that are produced by sampling said input signals at a rate which is sufficiently high that a human ear perceives said discrete segments as being mixed together and constituting a single analog signal;
• an analog-to-digital converter to convert said discrete segments to a sequence of time sequenced binary outputs;
• a multiplier/accumulator to multiply each of said binary outputs by a number corresponding with a desired degree of attenuation to produce time sequenced multiplied binary outputs;
• a digital-to-analog converter to convert said multiplied binary outputs to time sequenced analog outputs;
• and
• a control circuit maintaining synchronization of said gate, said analog-to-digital converter, said multiplier/accumulator and said digital-to-analog converter;
• output means for producing stereo, mono, waveform samplable, and telephony outputs from said digitally volume controlled signals;
• including
• a left channel output circuit receiving said left channel combined signal and producing a left channel output signal, a right channel output circuit receiving said right channel combined signal and producing a right channel output signal, and a mono channel output circuit receiving said mono combined signal and producing a mono output signal;
• and
• data control means for controlling said digital means and said output means;
• including
• a plurality of configuration data registers, one of each of said configuration data registers corresponding to said left channel output circuit, said right channel output circuit, and said mono output circuit, said configuration data registers further controlling said output circuits to provide a selectable output format;
• and
• an index register receiving a plurality of externally generated data inputs and providing said data inputs to said configuration data registers and said multiplier/accumulator.