Liquid crystal display device with TFTS in which pixel electrodes are formed in the same plane as the gate electrodes with anodized oxide films before the deposition of silicon

An active matrix display device, comprising:

• at least one row and at least one column of picture cells provided over a transparent substrate, each picture cell being coupled to a scanning line and a video signal line, and each picture cell including a pixel electrode, a thin film transistor, having drain, source and gate electrodes, and a storage capacitor, said pixel electrode being electrically connected to one of the source and drain electrodes of said thin film transistor and to an electrode corresponding to said storage capacitor,
• wherein said thin film transistor is comprised of a gate electrode corresponding to a first conductive layer, a gate insulator provided on said gate electrode, a channel region provided above said gate electrode and including an amorphous silicon layer provided on said gate insulator, and the source and drain electrodes of said thin film transistor are provided at laterally opposing ends of said channel region,
• wherein said pixel electrode is comprised of a second conductive layer,
• wherein said storage capacitor is comprised of a first electrode including a third conductive layer, a second electrode including a fourth conductive layer electrically contacting said pixel electrode at an upper surface of said second conductive layer and a dielectric insulator interposed between the third and fourth conductive layers, said fourth conductive layer being a higher-level layer than said third conductive layer, and
• wherein the gate insulator of said thin film transistor and the dielectric insulator of said storage capacitor of each picture cell correspond to a same insulator layer, said gate insulator being provided to cover both an upper surface and end side surfaces of said first conductive layer corresponding to said gate electrode and being extended to cover an adjacent end side surface and upper corner surface of said second conductive layer of a corresponding pixel electrode, and said dielectric insulator being provided to cover both an upper surface and end side surfaces of said third conductive layer and being extended to cover an adjacent end side surface and upper corner surface of said second conductive layer of said corresponding pixel electrode.

An active matrix display device, comprising:

• at least one row and at least one column of picture cells provided over a transparent substrate, each picture cell being coupled to a scanning line which is extended in a row direction and a video signal line which is extended in a column direction, and each picture cell including a pixel electrode, a thin film transistor, having drain, source and gate electrodes, and a storage capacitor, said pixel electrode being electrically connected to one of the source and drain electrodes of said thin film transistor and to an electrode corresponding to said storage capacitor, and said video signal line being extended adjacent the other of said source and drain electrodes thereof,
• wherein said thin film transistor is comprised of a gate electrode corresponding to a first conductive layer, a gate insulator provided on said gate electrode, a channel region provided above said gate electrode and including an amorphous silicon layer provided on said gate insulator, and the source and drain electrodes of said thin film transistor are provided at laterally opposing ends of said channel region,
• wherein said pixel electrode is comprised of a second conductive layer,
• wherein said storage capacitor is comprised of a first electrode, a second electrode and a dielectric insulator interposed between the first and second electrodes,
• wherein the gate insulator of said thin film transistor and the dielectric insulator of said storage capacitor of each picture cell correspond to a same insulator layer, said gate insulator being provided to cover both an upper surface and end side surfaces of said first conductive layer corresponding to said gate electrode and being extended to cover an adjacent end side surface and upper corner surface of said second conductive layer of a pixel of a corresponding picture cell and an adjacent end side surface and upper corner surface of another, second conductive layer corresponding to a pixel electrode of an adjacently disposed picture cell in a row direction, and
• wherein said gate insulator of said thin film transistor of each picture cell is extended over spacings separating said gate electrode of each picture cell and a pixel electrode of an adjacent picture cell in the row direction in such a manner that said video signal line is electrically isolated from the gate electrode of each thin film transistor of a corresponding column of picture cells and from the second conductive layer corresponding to each pixel electrode of an adjacently disposed column of picture cells in the row direction.

An active matrix display device, comprising:

• at least one row and at least one column of picture cells provided over a transparent substrate, each picture cell being coupled to a scanning line which is extended in a row direction and a video signal line which is extended in a column direction, and each picture cell including a pixel electrode, a thin film transistor, having drain, source and gate electrodes, and a storage capacitor, said pixel electrode being electrically connected to one of the source and drain electrodes of said thin film transistor and to an electrode corresponding to said storage capacitor, and said video signal line being extended adjacent the other of said source and drain electrodes thereof,
• wherein said thin film transistor is comprised of a gate electrode corresponding to a first conductive layer, a gate insulator provided on said gate electrode, a channel region provided above said gate electrode and including an amorphous silicon layer provided on said gate insulator, and the source and drain electrodes of said thin film transistor are provided at laterally opposing ends of said channel region,
• wherein said pixel electrode is comprised of a second conductive layer,
• wherein said storage capacitor is comprised of a first electrode, a second electrode and a dielectric insulator interposed therebetween, said first electrode including a third conductive layer and said second electrode including a fourth conductive layer corresponding to a higher-level conductive layer than that of said first electrode and corresponding to a same conductive layer as that for providing said source and drain electrodes,
• wherein said gate insulator corresponding to each picture cell is provided to cover both an upper surface and end side surfaces of said first conductive layer of a corresponding gate electrode and is extended to cover an adjacent end side surface and upper corner surface of said second conductive layer of a corresponding pixel electrode, and
• wherein said dielectric insulator is provided to cover both an upper surface and end side surfaces of said third conductive layer corresponding to said first electrode of said storage capacitor of each picture cell and being extended to cover an adjacent end side surface and upper corner surface of said second conductive layer of said corresponding pixel electrode.