Multi-resolution video apparatus and method for displaying biological data

A video graphics system for displaying waveforms on a video monitor having a finite bandwidth defining a minimum pulsewidth for illuminating a pixel comprising:

• a first memory for storing a first video image having a first horizontal resolution;
• means for clocking data out of the first memory at a first rate to provide a first video data stream having a first display pixel pulsewidth at least as great as said minimum pulsewidth;
• a first RAMDAC having a digital input for receiving the first video data stream, and an analog RGB current output;
• a second memory for storing a second video image having a second horizontal resolution;
• means for clocking data out of the second memory at a second rate in excess of the video monitor bandwidth to provide a second video data stream;
• means for packetizing the second video data stream into display pixels each having a second display pixel pulsewidth at least as great as said minimum pulsewidth to produce a second displayable video data stream:
• a second RAMDAC having a digital input for receiving the second displayable video data stream, and an analog RGB current output;
• means for synchronizing the first video data stream and second displayable video data stream;
• and
• means for combining the analog RGB current outputs from the first and second RAMDACs to form a combined analog RGB current output.

A video graphics system comprising:

• a video monitor having a finite bandwidth defining a minimum pulsewidth for illuminating a pixel, horizontal and vertical sync inputs, and an RGB input;
• a first memory for storing a first video image represented by a first number of low-resolution pixels per horizontal line, the first memory having a clock input and a data output;
• a first RAMDAC having a digital input coupled to the data output of the first memory, a clock input, and an analog RGB current output;
• a sync generator having a clock input, a horizontal sync output coupled to the monitor horizontal sync input, and a vertical sync output coupled to the monitor vertical sync input;
• a system clock generator for providing a low speed clock to the clock input of the first memory, first RAMDAC, and sync generator;
• a second memory for storing a second video image represented by a second number of high-resolution pixels per horizontal line, the second memory having a clock input and a data output and the high resolution pixels having a pulsewidth less than said minimum pulsewidth;
• means for packetizing the high resolution pixels into display pixels each having a second display pixel pulsewidth at least as great as said minimum pulsewidth;
• a second RAMDAC having a digital input coupled to the data output of the second memory, a clock input, and an analog RGB current output;
• a phase-locked loop having an input coupled to the horizontal sync output of the sync generator, and an output for providing a high speed clock having a frequency in excess of the video monitor bandwidth to the clock input of the second memory and second RAMDAC;
• and
• a summer having first and second inputs for receiving the analog RGB current outputs from the first and second RAMDACs, and an output coupled to the monitor RGB input for providing a composite RGB current output.

A method for improving the resolution of a video display comprising the steps of:

• receiving a first video pulse train comprised of a series of low-speed pulses, each low-speed pulse having a minimum low-speed pulse width corresponding to an individual low-resolution pixel on the display;
• receiving a second video pulse train comprised of a series of high-speed pulses, each high-speed pulse having a minimum high-speed pulse width less than the minimum low-speed pulse width corresponding to a high-resolution pixel;
• packetizing the high-speed pulses into high-speed packets wherein each packet has a minimum pulse width at least as great as the minimum low-speed pulse width;
• combining the first video pulse train and the high-speed packets to form a combined video pulse train;
• and
• displaying the combined video pulse train on the video display.

A method for improving the resolution of a video display, the display equipped to receive a series of low-speed pulses, each pulse having a minimum low-speed pulse width corresponding to an individual pixel on the display, the method comprising the steps of:

• receiving a high-speed pulse train comprised of a series of high-speed pulses, each high-speed pulse having a minimum high-speed pulse width less than the minimum low-speed pulse width corresponding to a high-resolution pixel;
• packetizing the high-speed pulses into high-speed packets wherein each packet has a minimum pulse width at least as great as the minimum low-speed pulse width;
• and
• displaying the high-speed packets on the video display.