US 5,402,061 AGranted

Temperature independent current source

AssigneeTektronix, Inc.

InventorsJames W. H. Marsh, Keith H. Lofstrom

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Abstract

An improvement is provided for current sources of the type having three transistors configured as follows: The bases of the first (Q1) and second (Q2) transistors are tied together. The collector of the first transistor (Q1) is coupled to a first voltage (V.sub.CC,V.sub.EE) via a first resistor (R1). The emitter of the first transistor (Q1) is coupled to a second voltage (V.sub.EE,V.sub.CC) via a second resistor (R2). The collector of the second transistor (Q2) produces the output current (I.sub.OUT). The emitter of the second transistor (Q2) is coupled to the second voltage (V.sub.EE,V.sub.CC) via a third resistor (R3). The base of the third transistor (Q3) is coupled, either directly or indirectly through a fourth transistor (Q4), to the collector of the first transistor (Q1). The collector of the third transistor (Q3) is connected to the first voltage (V.sub.CC,V.sub.EE) and the emitter of that transistor (Q3) is connected to the bases of the first (Q1) and second (Q2) transistors. The improvement consists of a fourth resistor (R5) coupled between the base and the emitter of the first transistor (Q1), the fourth transistor preferably having a value that is one half of the value of the first resistor (R1) when no fourth transistor (Q4) is present and having a value that is equal to the value of the first resistor (R1) when a fourth transistor (Q4) is in the base path of the third transistor (Q3).

An improved current source of the type having:

a first (Q1) transistor, the first transistor having a controlling terminal and first and second controlled terminals;
a second (Q2) transistor, the second transistor having a controlling terminal and first and second controlled terminals, with the controlling terminal of the second transistor being connected to the controlling terminal of the first transistor (Q1) and the first controlled terminal of the second transistor producing an output current (I.sub.OUT);
a first resistor (R1) coupled between the first controlled terminal of the first transistor (Q1) and a first voltage (V.sub.CC,V.sub.EE);
a second resistor (R2) coupled between the second controlled terminal of the first transistor (Q1) and a second voltage (V.sub.EE,V.sub.CC);
a third resistor (R3) coupled between the second controlled terminal of the second transistor (Q2) and the second voltage (V.sub.EE,V.sub.CC);
a third transistor (Q3), the third transistor having a controlling terminal and first and second controlled terminals with the controlling terminal of the third transistor coupled to the first controlled terminal of the first transistor (Q1), the first controlled terminal of the third transistor being coupled to the first voltage (V.sub.CC,V.sub.EE), and the second controlled terminal of the third transistor being coupled to the controlling terminals of the first (Q1) and second (Q2) transistors;
a fourth resistor (R5) coupled between the controlling terminal and the second controlled terminal of the first (Q1) transistor;
a fourth transistor (Q4), the fourth transistor having a controlling terminal and first and second controlled terminals, with the controlling terminal of the fourth transistor connected to the first controlled terminal of the first transistor (Q1), the first controlled terminal of the fourth transistor connected to the second voltage (V.sub.CC), and the second controlled terminal of the fourth transistor being resistively coupled to the first voltage (V.sub.EE);
and
a fifth resistor (R6) coupled between the second controlled terminal of the fourth transistor and the first voltage source (V.sub.CC).

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Abstract

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