US 5,402,013 AGranted

Common mode logic multiplexer configuration

AssigneeSiemens Aktiengesellschaft

InventorDirk Friedrich

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Abstract

A multiplexer configuration includes at least one first and one second group of transistors each including one first, one second and at least one third transistor. Current sources are connected to a first supply potential terminal and emitters of the transistors of each respective one of the groups are connected to one another and to a respective one of the current sources. A first resistor has one terminal connected to a second supply potential terminal and has another terminal and collectors of the first transistors of each respective one of the groups are connected to one another and to the other terminal of the first resistor. An output terminal is connected to the other terminal of the first resistor. Bases of the second transistors of each respective one of the groups are input terminals for a respective data signal. Bases of the third transistors of each respective one of the groups are terminals for a respective selection signal. The selection signals are mutually complementary. Second resistors each have one terminal being connected to the second supply potential terminal and another terminal. Collectors of the second and third transistors of each respective one of the groups are connected to one another and to the other terminal of a respective one of the second resistors. The other terminal of the second resistor of each respective one of the groups is connected to the base of the first transistor of the respective group.

Claims5

Dependent claims

A multiplexer configuration, comprising:

a) at least one first group and at least one second group of transistors each including one first, one second and at least one third transistor each having an emitter, a collector and a base;
b) a terminal for a first supply potential, current sources connected to said terminal for the first supply potential, the emitters of said transistors of each respective one of said groups being connected to one another and being connected to a respective one of said current sources;
c) a terminal for a second supply potential, a first resistor having one terminal connected to said terminal for the second supply potential and having another terminal, the collectors of said first transistors of each respective one of said groups being connected to one another and being connected to the other terminal of said first resistor;
d) an output terminal being connected to the other terminal of said first resistor;
e) the bases of said second transistors of each respective one of said groups being an input terminal for a respective data signal;
f) the bases of said third transistors of each respective one of said groups being a terminal for a respective selection signal;
g) the selection signals being complementary to one another;
h) second resistors each having one terminal being connected to said terminal for the second supply potential and each having another terminal, the collectors of said second and third transistors of each respective one of said groups being connected to one another and being connected to the other terminal of a respective one of said second resistors;
and
i) the other terminal of said second resistor of each respective one of said groups being connected to the base of said first transistor of said respective group.

7 more elements

Dependencies are inferred from the claim text.