Method of fabrication an inverse open frame alignment mark
AssigneeCypress Semiconductor Corporation
InventorRoger F. Caldwell
Life of this patent
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Abstract
A method for forming an alignment mark during semiconductor device manufacturing. A first area and a second area are provided on the semiconductor substrate wherein the second area is adjacent to the first area. An alignment mark is formed in the first area. A first layer is formed over the first area and the second area wherein the alignment mark is replicated in the first layer. The first layer is then removed from the second area and left over the first area. A globally planarized second layer, is formed over the first area and the second area. The second layer is then removed from the first area and is left over the second area.
Claims14
A method for forming an alignment mark on a semiconductor substrate, said method comprising the steps of:
- forming an alignment mark on said semiconductor substrate, wherein said alignment mark is formed in a first area of said semiconductor substrate, wherein said first area is directly adjacent to a second area of said semiconductor substrate;
- forming a first layer over said first area and over said second area, wherein said alignment mark is replicated in said first layer;
- removing a first layer such that said first layer is removed from said second area, and remains over said first area;
- forming a second layer over said first area and over said second area;
- planarizing said second layer;
- and
- removing said planarized second layer such that said planarized second layer is removed from said first area to uncover said alignment mark formed in said first layer, and remains over said second area.
A method of claim i further comprising the step of forming a third layer such that said third layer is formed over said first area and replicates said alignment mark and such that said third layer does not form in said second area.
A method for forming an alignment mark on a semiconductor substrate, said method comprising the steps of:
- forming an alignment mark on said semiconductor substrate, wherein said alignment mark is formed in a first area of said semiconductor substrate, wherein said first area is directly adjacent to a second area of said semiconductor substrate;
- growing an oxide layer such that said oxide layer is grown over said first area and substantially replicates said alignment mark and such that said oxide is not grown over said second area;
- depositing a polysilicon layer over said first area and said second area, wherein said alignment mark is replicated in said polysilicon area;
- etching said polysilicon layer such that said polysilicon layer is removed from said second area and remains over said first area;
- depositing a first insulating layer comprising silicon dioxide over said first area and said second area;
- planarizing said first insulating layer by chemical-mechanical polishing such that said alignment mark is not substantially replicated in said first insulating layer;
- and
- etching said first insulating layer such that said first insulating layer is removed from said first area to reveal said alignment mark replicated in said polysilicon layer, and remains over said second area.
Dependencies are inferred from the claim text.