Method of metal silicide formation in integrated circuit devices

A method of metal silicide formation on a silicon substrate comprising the steps of:

• forming contact holes in the substrate to expose silicon;
• annealing the substrate after contact hole opening in dry oxygen to form about 200 .ANG. SiO.sub.2 ;
• wet etching the annealed substrate in buffered hydrofluoric acid to remove the oxide layer;
• vacuum depositing a metal film at room temperature on the substrate;
• vacuum baking the substrate with deposited metal film at 200.degree. to 450.degree. C.;
• sintering the baked substrate at 500.degree. to 900.degree. C. in inert gas ambient;
• and
• then etching the substrate to remove unreacted metal.

A method of platinum silicide (PtSi) formation on a silicon wafer in the manufacture of integrated circuit devices comprising the steps of:

• forming passivating layers on the silicon wafer;
• forming contact holes in the passivating layers by reactive ion etching to expose silicon surfaces on the wafer;
• annealing the wafer after contact hole opening in dry oxygen to form about 200 .ANG. SiO.sub.2 ;
• wet etching the annealed wafer in buffered hydrofluoric acid to remove the oxide layer;
• sputter depositing 250 to 650 .ANG. of platinum upon the wafer at room temperature to fill the contact holes;
• vacuum baking the substrate at a temperature in the range of 250.degree. to 350.degree. C. and pressure of .about.5.times.10.sup.-6 Torr for a prescribed time between 2 and 30 minutes;
• sintering the substrate at 550.degree. C. in a nitrogen gas atmosphere for approximately 10 to 30 minutes;
• and
• etching the substrate in an aqua regia etch at a temperature of approximately 60.degree. C. for 20 minutes.