Method and equipment for plasma processing

A plasma processing method, including:

• forming a first plasma in a first processing chamber when the chamber contains a substrate to be processed;
• first plasma processing of the substrate with the first plasma with control by a first potential distribution that tends to stagnate negatively charged dust particles above the substrate in the first processing chamber;
• first switching over of the first potential distribution in the first processing chamber to a sub-potential distribution to push the negatively charged dust particles stagnating near a main surface of the substrate toward an outer periphery of the substrate;
• thereafter first conveying of the substrate after the first plasma processing to a second processing chamber in a non-oxidizing atmosphere including vacuum;
• second plasma processing of the substrate with a second plasma in the second processing chamber and in a second potential distribution that tends to stagnate negatively charged second dust particles above the substrate in the second processing chamber;
• and
• second switching over of the second potential distribution in the second processing chamber to a second sub-potential distribution to push negatively charged second dust particles stagnating near the main surface of the substrate toward the outer periphery of the substrate.

A method of producing a semiconductor integrated circuit wherein a substrate is plasma processed in a high vacuum chamber with a potential distribution forming a field adjacent the substrate to control the plasma processing, wherein the improvement is in the removal of negatively charged dust particles that stagnate adjacent the substrate during plasma processing due to the potential distribution and which negatively charged dust particles will contaminate the substrate upon discontinuance of plasma processing and the potential distribution, comprising the steps of:

• while the dust particles are stagnating adjacent the substrate, forming a sub-potential distribution that moves the negatively charged dust particles to the outer periphery of the substrate;
• and
• supplying electric power sufficient to maintain the plasma adjacent the substrate and sufficient to conduct the plasma processing;
• and
• reducing the electrical power during said forming so that the reduced electric power is sufficient to maintain the plasma and insufficient to continue plasma processing.

A plasma processing method for carrying out predetermined plasma processing to a major surface of a semiconductor wafer in a processing chamber, the predetermined plasma processing comprising:

• forming a first electric potential distribution of processing space and plasma over and adjacent to the major surface of the semiconductor wafer so that the first electric potential distribution tends to stagnate negatively charged dust particles over the major surface of the wafer;
• changing the first electric potential distribution of the processing space and plasma into a second electric potential distribution to evacuate the negatively charged particles over the major surface of the wafer to an outer periphery of the wafer by applying high frequency alternating current electric power to an electrode disposed adjacent to the outer periphery of the wafer;
• and
• thereby moving the negatively charged dust particles stagnating near the major surface of the wafer toward the outer periphery of the wafer with the second electric potential distribution.

A plasma processing method, comprising the steps of:

• forming a first plasma in processing space of a first processing chamber adjacent to a major surface of a semiconductor wafer to be processed in the first processing chamber;
• carrying out first plasma processing to the wafer with the first plasma with a first electric potential distribution of the processing space;
• changing the first electric potential distribution in the first processing chamber to a second electric potential distribution of the processing space to evacuate negatively charged dust particles stagnating over the major surface of the wafer toward an outer periphery of the wafer;
• transferring the wafer after the first plasma processing to a second processing chamber under a non-oxidizing atmosphere;
• and
• thereafter carrying out second plasma processing to the wafer in the second processing chamber.

A method of fabricating a semiconductor integrated circuit by plasma processing a semiconductor wafer in a high vacuum chamber with a first electric potential distribution adjacent to a major surface of the semiconductor wafer to control the plasma processing, wherein the improvement is in the removal of negatively charged dust particles that stagnate adjacent the wafer during the plasma processing due to the first electric potential distribution and which negatively charged dust particles will contaminate the wafer upon discontinuance of plasma processing and discontinuance of the first electric potential distribution, the improvement comprising the steps of:

• while the negatively charged dust particles are stagnating over the semiconductor wafer, forming a second potential distribution and thereby moving the negatively charged dust particles to the outer periphery of the semiconductor wafer;
• supplying electric power sufficient to maintain the plasma adjacent to the wafer and sufficient to conduct the plasma processing at least prior to said moving;
• and
• reducing the electrical power during said moving so that the reduced electric power is sufficient to maintain the plasma and insufficient to continue plasma processing.

A method of fabricating a semiconductor integrated circuit wherein a semiconductor wafer is plasma processed under a high vacuum condition in a first plasma processing chamber with a first electric potential distribution adjacent to a major surface of the semiconductor wafer to control plasma processing, wherein the improvement is in the removal of negatively charged dust particles that stagnate over the semiconductor wafer during the plasma processing due to the first electric potential distribution and which negatively charged dust particles will contaminate the semiconductor wafer upon discontinuance of the plasma processing and discontinuance of the first electric potential distribution, the improvement comprising the steps of:

• (a) while the negatively charged dust particles are stagnating over the major surface of the semiconductor wafer in the first plasma processing chamber, forming a second electric potential distribution and thereby moving the negatively charged dust particles to the outer periphery of the semiconductor wafer;
• (b) discontinuing the plasma processing;
• (c) after step (b), transporting the semiconductor wafer to a second plasma processing chamber under a vacuum condition during the transporting;
• and
• (d) carrying out second plasma processing to the semiconductor wafer in the second chamber in a vacuum condition without exposing the semiconductor wafer to an outer gas atmosphere throughout and between the steps of (a) to (d).