Method for controlling the delivery from cells

A circuit for controlling an inflow of data cells of a virtual circuit of an asynchronous input time multiplex in order to control an outflow of data cells of said virtual circuit on an output multiplex, said circuit comprising an input multiplex means (XE), and an output multiplex means (XS), a memory means (MCO) coupled to receive signals from said input multiplex means (XE), said memory means (MCO) comprising one storage zone for each virtual circuit, each zone being divided into sections S1, S2 and S3) in which there are respectively stored an imaginary time of emission (tde) of a last data cell that was emitted, a minimum time period (pm), and a maximum duration of a delay (dm) of a corresponding virtual circuit, said memory means (MCO) being addressed in response to an arrival of an incoming data cell on a input multiplex means, said address being a number identifying the virtual circuit to which said incoming data cell belongs, a AND gate (ET) having an input which is connected to the input multiplex means (XE) and an output which is connected to the output multiplex means (XS), calculating unit means (UC) having a plurality of inputs respectively connected to a plurality of read outputs of the memory means (MCO) in order to read there each section (S1, S2 and S3) of an addressed zone, said calculating unit means (UC) having a first output (Rej) connected to a control input of the AND gate (ET) in order to authorize or not authorize the emission on the output multiplex means (XS) of the data cell which is present on the input multiplex means (XE), said calculating unit means (UC) having a second output (tdes) connected to a write input of the memory means (MCO) in order to store in the section (S1) of the zone addressed an imaginary time of emission (tde) of the incoming data cell, said imaginary time of emission being calculated by said calculating unit means (UC), clock means for establishing a time basis (BT) and coupled to control at least said memory means (MCO) and said calculating unit means (UC), an output (t) of clock means (BT) being connected to a corresponding input of the calculating unit means (UC), said calculating unit means (UC) delivering the imaginary time of emission (tde) of the last data cell emitted as a function of local time indicated by said time basis, said imaginary time of emission being the sum of the minimum period (pm) and of the maximum duration (dm) respectively stored in the corresponding sections (S1, S2 and S3) of the zone of the memory means (MCO) which is addressed by the incoming data cell, said AND gate (ET) ordering an emission of said data cell in response to a signal at a control input of the AND gate (ET), and said calculating unit means calculating an imaginary time of emission (tdes) of said incoming data cell in order to store it in the corresponding section (S1) of the zone addressed by the said data cell.