Analog current memory

An analog current memory arrangement comprising an input for receiving an input current, an output for providing an output current reproducing one of the input current and a current related thereto, first and second current memory cells, and current combining means, wherein the first current memory cell comprises means for sensing the input current during a first sub-portion of a first portion of a clock period and means for reproducing the sensed current as an output current during a second sub-portion of the first portion of the clock period, the second current memory cell comprises means for sensing the sum of the input current and the output current of the first current memory cell during the second sub-portion, the first and second current memory cells comprise means for reproducing the currents sensed at their inputs to produce first and second output sub-currents during at least one of a second later portion of said clock period and a later clock period, the current combining means is arranged to combine the first and second output sub-currents, and means are provided for applying the combined sub-currents to the current output.