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US 5,400,003 AGranted
Inherently impedance matched integrated circuit module
AssigneeMicron Technology, Inc.
InventorKenneth J. Kledzik
Life of this patent
Estimating the term…
Abstract
A semiconductor circuit module is formed with external connections on coaxial pins. This provides a controlled impedance between a ground connection and a signal connection which is substantially equal per unit length. The module may be configured so that the impedance of the connection between the signal connections and integrated circuit may also be optimally impedance matched.
Claims19
An electronic component comprising:
- a) a substrate having top and bottom sides and having circuit traces thereon;
- b) active circuitry installed on the substrate and connected to the circuit traces;
- and
- c) a plurality of connectors connected to the circuit traces;
- the connectors each consisting of a primary conductor and a secondary conductor, wherein an impedance between the primary conductor and the secondary conductor per unit length is a predetermined value;
- and whereby said component may be interconnected by said connectors with a further one of said component, said component configured so as to mate with said further component through said connectors so as to form an interconnected stack of a plurality of said component, and said stack connectable through a bottom said component of said stack to external circuitry, and wherein said impedance between said primary conductor and said secondary conductor of each of said connectors is selected in order to match impedances of said active circuitry and said external circuitry.
3 more elements
A multichip module comprising:
- a) a plurality of interconnected components, each component of said plurality comprising:
- a substrate with active circuitry thereon, and the substrate having circuit traces thereon;
- the substrate having top and bottom sides;
- the active circuitry connected to the circuit traces;
- the substrate having a plurality of connectors connected to the circuit traces, the connectors each consisting of a primary conductor and a secondary conductor, wherein an impedance between the primary conductor and the secondary conductor per unit length is a predetermined value;
- and wherein
- b) the connectors of one of said components of said plurality are connectable to connectors of a further one of said components of said plurality which, in turn, may be interconnected with additional said components of said plurality to form the multi-chip module, a bottom said component of said multi-chip module connectable to external circuitry, wherein said impedance between said primary conductor and said secondary conductor of each of said connectors is selected in order to match impedances of said active circuitry and said external circuitry.
4 more elements
A module for video signal processing, the module comprising:
- a) a plurality of components, each component of said plurality comprising:
- a substrate with active circuitry thereon, the substrate having circuit traces thereon;
- the substrate having top and bottom sides;
- the active circuitry connected to the circuit traces;
- the substrate having a plurality of connectors connected to the circuit traces, the connectors each consisting of a primary conductor and a secondary conductor, wherein an impedance between the primary conductor and the secondary conductor per unit length is a predetermined value;
- the connectors of one of said components of said plurality being connectable to connectors of a further one of said components of said plurality which, in turn, may be interconnected with additional said components of said plurality. a bottom said component connectable to external circuitry, and wherein said impedance between said primary conductor and said secondary conductor of each of said connectors is selected in order to match impedances of said active circuitry and said external circuitry;
- and
- b) a video address circuit, the video address circuit receiving signals through at least a portion of the connectors and providing an output in the form of bit mapped signals.
5 more elements
Dependencies are inferred from the claim text.