Digital frequency generation device

In an improved digital frequency generating device having an output stage and a first digital frequency generator, with an output, for generating a first signal having a selectable first frequency f.sub.1 and a first phase .phi..sub.1, the first signal being connectable to the output stage for generating an output stage signal having the first frequency f.sub.1 and the first phase .phi..sub.1, the generating device being adapted to, at any time, switch the first frequency f.sub.1 of the output stage signal to a selectable second frequency f.sub.2 having a second phase .phi..sub.2 which is defined with respect to the first frequency f.sub.1, the improvement comprising:

• a system clock;
• a second digital frequency generator, having an output and responsive to the system clock for generating a second signal having the second frequency f.sub.2 and the second phase .phi..sub.2, and
• a first multiplexer to connect the output from one of the first and second digital frequency generators to the output stage, whereby the first frequency generator is responsive to the system clock and continues to run independently of the second digital frequency generator,
• wherein the first digital frequency generator comprises:
• a first phase incrementation element,
• a first phase register, and
• a first adding element connected between the first phase incrementation element and the first phase register, whereby, in phase with the system clock, the first phase register repeatedly increments the phase first .phi..sub.1 sent to the output of the first digital frequency generator by a fixed phase increment .DELTA..phi..sub.1, and wherein the second digital frequency generator comprises:
• a second phase register,
• a second adding element, a second multiplexer connected between the first adding element and the second phase register as well as between the second adding element and the second phase register, and
• a second phase incrementation element connected to the second adding element, whereby, in phase with the system clock, the second multiplexer, in response to signal from a control element connects of the second adding element to the second phase register, whereby the second phase register repeatedly increments the second phase .phi..sub.2 sent to the output of the second digital frequency generator by a fixed phase increment .DELTA..phi..sub.2 or connects the first adding element to the second phase register, and the first multiplexer is connected between the outputs of the first and second digital frequency generators and the output stage as well as to the control element, whereby, in response to said signal from the control element, the first multiplexer connects one of the output of the first digital frequency generator and the output of the second digital frequency generator to the output stage.