Peak amplitude detector for use in a synchronized position demodulator
AssigneeElsag International N.V.
InventorAllan C. Zoller
Life of this patent
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Abstract
A peak amplitude detector for use in a synchronized position demodulator associated with a linear variable differential transformer. The peak amplitude detector adjusts for phase shift in the transformer and maintains the full bandwidth of the transformer. The detector obtains the maximum positive or negative amplitude of the sinusoidal signal at one of the secondary windings of the transformer by first counting either a positive or negative half cycle of the signal and then while down counting one half of the counted half cycle sampling the amplitude of the sinusoidal signal. The sampling ends when the count reaches zero.
Claims13
A peak amplitude detector for a sinusoidal signal comprising:
- a) first means responsive to a clock signal for counting a half cycle of said sinusoidal signal starting when said sinusoidal signal crosses zero amplitude in one direction and ending when said sinusoidal signal crosses zero amplitude in the opposite direction, said first means holding a count representative of said half cycle when said counting ends;
- b) second means responsive to said clock signal for counting one half of said half cycle representative count when said sinusoidal signal next crosses zero amplitude in said one direction;
- and
- c) sample and hold amplifier means for sampling the amplitude of said sinusoidal signal starting when said second means reaches a first predetermined count in its counting of one half of said half cycle representative count and ending when said second means count reaches a second predetermined count whereby said amplifier means holds the maximum amplitude of said sinusoidal signal when said sampling ends.
A method for detecting the peak amplitude of a sinusoidal signal comprising the steps of:
- a) counting in a first means in response to a clock signal generated external to said first means a half cycle of said sinusoidal signal starting when said sinusoidal signal crosses zero amplitude in one direction and ending when said sinusoidal signal crosses zero amplitude in the opposite direction, said first means holding a count representative of said half cycle when said counting ends;
- b) counting in a second means in response to said externally generated clock signal one half of said half cycle representative count when said sinusoidal signal next crosses zero amplitude in said one direction;
- and
- c) sampling using a sample and hold amplifier means the amplitude of said sinusoidal signal starting when said second means reaches a first predetermined count in its counting of one half of said half cycle representative count and ending when said second means count reaches a second predetermined count whereby said amplifier means holds said peak amplitude of said sinusoidal signal when said sampling ends.
Dependencies are inferred from the claim text.