Negative voltage generator for flash EPROM design
AssigneeMacronix International Co., Ltd.
InventorsTien-Ler Lin, Liang Chao
Life of this patent
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AssigneeMacronix International Co., Ltd.
InventorsTien-Ler Lin, Liang Chao
Estimating the term…
A circuit is provided for supplying a negative high voltage to an integrated circuit from a high positive voltage source V.sub.PP. The negative voltage is applied to a plurality of FLASH electrically erasable programmable read only memory (EPROM) cells. The circuit includes an oscillator coupled to a voltage converter which provides a periodic signal. The periodic signal is coupled to a charge pump including three P-channel type transistors to produce the negative voltage. The source and drain of the first transistor is coupled to the periodic signal. The second transistor's gate and drain is coupled to a reference ground potential with the source coupled to the first transistor's gate. Finally, the third transistor's drain and gate is coupled to the first transistor's gate and the third transistor's source outputs negative voltage to floating gates of the plurality of FLASH EPROM cells during an erase operation. Further, the negative voltage generated is relatively precise, so no regulation is required.
A circuit for supplying a negative voltage to an output node, comprising:
A circuit, comprising:
A memory circuit receiving a operating supply voltage and a programming supply voltage, comprising:
Dependencies are inferred from the claim text.