US 5,399,920 A · CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET

Abstract

The low-power two-stage data output buffer (20,70) includes a two-stage switching circuit (50, 72) that drives an n-channel pull-up transistor (24) in two stages, thus only using current from the pumped high voltage supply during the second stage of the operation. The two-stage switching circuit (50, 72) first drives the pull-up transistor (24) with the supply voltage, V.sub.DD, then drives it with the pumped high voltage supply, V.sub.PP. A feedback circuit, coupled between the output node (28) and the two-stage switching circuit (50, 72), generates a path from the high voltage supply, V.sub.PP, to the n-channel pull-up transistor (24) in response to the supply voltage level appearing on the output node (28), and blocks the path from the high voltage supply, V.sub.PP, to the supply voltage.

Claims16

Dependent claims

A data output buffer coupled to a high voltage supply and a supply voltage for driving an n-channel pull-up device coupled to an output node in response to a logic level on a data node, comprising:

a two-stage switching circuit coupled to said high voltage supply and said supply voltage for supplying a supply voltage to said n-channel pull-up device in response to a logic one appearing on the data node;
and
a feedback circuit, coupled between the output node and said two-stage switching circuit, for generating a path from the high voltage supply to said n-channel pull-up device in response to the supply voltage level appearing on the output node.

A low-power output buffer coupled to a high voltage supply and a supply voltage for driving an n-channel pull-up device coupled to an output node in response to the logic level on a data node, where the high voltage supply generates a high voltage greater than the supply voltage, the output buffer comprising:

a high-voltage switching circuit receiving the logic level on the data node and for supplying the high voltage to a first node;
a two-stage switching circuit coupled to said first node for driving said n-channel pull-up device and generating a voltage level approximating the supply voltage at the output node;
and
a feedback circuit, coupled between the output node and said two-stage switching circuit, for generating a path from said first node to said n-channel pull-up device, driving said n-channel pull-up device, and boosting the voltage level at the output node to approximately the supply voltage in response to the voltage level approximating the supply voltage less a threshold voltage appearing at the output node.

1 more element

Dependencies are inferred from the claim text.

CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET

Life of this patent

CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET

Life of this patent

Abstract

Claims16