US 5,399,913 A · Gate-drive circuit

Abstract

A gate-drive circuit (10) is an interface between a clock (12) and control circuit (14) and a circuit (16) comprising an isolated gate bipolar transistor (IGBT) devices. The clock (12) provides two complementary clock signals (CLK1, CLK2) to the gate-drive circuit (10); the control circuit provides a signal (ENABLE) for turning the gate-drive circuit on and off, and the gate-drive circuit outputs isolated supply voltages (+RAIL, -RAIL), a drive signal (GATE), and a common reference signal (EMITTER). The control signal is sent across an isolation boundary via a 2-MHz push-pull converter in the gate-drive circuit (10). A transformer (T1) in the gate-drive circuit provides the isolation boundary. The power required to switch the IGBT device (16) is sent through the same 2-MHz converter. The secondary of the 2-MHz push-pull transformer (T1) is referenced to the IGBT emitter. As the primary side circuitry receives "on" signals from the control board (14), the converter runs and charges secondary-side bulk storage capacitors (C16, C18) in the gate-drive circuit. The gate voltage of the IGBT device is held off until the bulk storage capacitors are charged to a minimum value. When the capacitors have charged, the IGBT gate is turned on as the signal is received from the push-pull converter. The gate is then turned off by a negative voltage when the signal received from the converter is removed.

Claims13

Dependent claims

A gate-drive circuit, comprising:

(a) a push-pull converter comprising (i) first and second gates, (ii) a transformer comprising a primary side operatively coupled to said first and second gates and a secondary side, (iii) a rectifier operatively coupled to said secondary side, and (iv) at least one storage capacitor coupled to said rectifier so as to receive charge when the converter is operating and provide positive and negative supply rails (+RAIL, -RAIL);
and
(b) a gate-drive secondary circuit providing a gate-drive output signal (GATE) at a voltage level between the levels of said positive supply rail and said negative supply rail, and comprising a first transistor (Q1) operatively coupled to said transformer, a second transistor (Q2) operatively coupled to said positive and negative supply rails, a third transistor (Q3) operatively coupled between said positive and negative supply rails and to said first and second transistors, and a Zener diode (D5) having a predetermined Zener breakdown voltage and coupled between said third transistor and said transformer so as to prevent said third transistor from turning on when the voltage on said supply rails is less than the Zener voltage.

A gate-drive circuit, comprising:

(a) a push-pull converter comprising (i) first and second gates, (ii) a transformer comprising a primary side operatively coupled to said first and second gates and a secondary side, (iii) a rectifier operatively coupled to said secondary side, and (iv) at least one storage capacitor coupled to said rectifier so as to receive charge when the converter is operating and provide positive and negative supply rails (+RAIL, -RAIL);
and
(b) a gate-drive secondary circuit comprising first and second transistors (Q4, Q5) arranged in an emitter-follower configuration and providing a gate-drive output signal (GATE), said first transistor being coupled to said positive supply rail and said second transistor being coupled to said negative supply rail, and further comprising a third transistor (Q1) operatively coupled to said first and second transistors and to said transformer, a fourth transistor (Q2) operatively coupled to said first and second transistors and to said positive and negative supply rails, a fifth transistor (Q3) operatively coupled between said positive and negative supply rails and to said first, second, third and forth transistors, and a Zener diode (D5) having a predetermined Zener breakdown voltage and coupled between said fifth transistor and said transformer so as to prevent said fifth transistor from turning on when the voltage on said supply rails is less than the Zener voltage.

A gate-drive system, comprising:

(a) clock means for generating first and second complementary clock signals;
(b) a control circuit comprising means for generating a control signal;
and
(c) a gate-drive circuit, coupled to said clock means and control circuit, comprising:
(i) a push-pull converter comprising square wave means for receiving said first and second clock signals and said control signal and generating first and second square waves that follow said first and second clock signals when said control signal is in a predetermined state;
a transformer comprising a primary side operatively coupled to said square wave means and a secondary side;
a rectifier operatively coupled to said secondary side;
and first and second storage capacitors coupled to said rectifier so as to receive charge when the converter is operating and provide positive and negative supply rails;
and
(ii) a gate-drive secondary circuit comprising first and second transistors providing a gate-drive output signal, said first transistor being coupled to said positive supply rail and said second transistor being coupled to said negative supply rails,
wherein said gate-drive secondary circuit further comprises a third transistor operatively coupled to said first and second transistors and to said transformer, a fourth transistor operatively coupled to said first and second transistors and to said positive and negative supply rails, a fifth transistor operatively coupled between said positive and negative supply rails and to said first, second, third and forth transistors, and a Zener diode having a predetermined Zener breakdown voltage and coupled between said fifth transistor and said transformer so as to prevent said fifth transistor from turning on when the voltage on said supply rails is less than the Zener voltage.

8 more elements

Dependencies are inferred from the claim text.

Gate-drive circuit

Life of this patent

Gate-drive circuit

Life of this patent

Abstract

Claims13