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US 5,399,886 AGranted
Heterojunction FET with a high potential barrier layer and gate structure
AssigneeFujitsu Limited
InventorYuuichi Hasegawa
Life of this patent
Estimating the term…
Abstract
A field effect semiconductor device which restricts current flow through a drain-gate path, but allows current to easily flow through a gate-source path. A high potential barrier layer is formed on the drain side of an active layer. The potential barrier layer has a wider energy band gap than the active layer. A source electrode and a drain electrode make ohmic contact with the active layer and a gate electrode exists between the source electrode and the drain electrode. The gate electrode is partially formed on the potential barrier layer and makes Schottky contact with the active layer on the source side of the semiconductor device and makes Schottky contact with the potential barrier layer on the drain side of the semiconductor device.
Claims20
A field effect semiconductor device comprising:
- a compound semiconductor active layer;
- first and second current electrode structures formed on and respectively making Ohmic contacts with said active layer;
- a gate electrode disposed between said first and second current electrode structures and on said active layer to define a first side of said gate electrode which is closer to said first current electrode structure than said second current electrode structure and a second side of said gate electrode which is closer to said second current electrode structure than said first current electrode structure, said gate electrode making a Schottky contact with said active layer;
- and
- relaxing means, disposed between said gate electrode and said active layer and under the first side of said gate electrode, the first side of said gate electrode contacting said active layer through said relaxing means and the second side of said gate electrode directly contacting said active layer to form an asymmetrical configuration of said relaxing means with respect to the first and second sides of said gate electrode, for relaxing an electric field formed under the first side of said gate electrode as compared to the semiconductor device configured without comprising said relaxing means and the first side of said gate electrode directly contacting said active layer, and for allowing easier injection of carriers between said second current electrode structure and said gate electrode as compared to the injection of carriers between said first current electrode structure and said gate electrode.
2 more elements
A field effect semiconductor device comprising:
- a semi-insulating compound semiconductor substrate;
- a compound semiconductor active layer formed on said semi-insulating compound semiconductor substrate;
- a source electrode formed on, and having ohmic contact with, said compound semiconductor active layer and defining a source side of said semiconductor device;
- a drain electrode formed on, and having ohmic contact with, said compound semiconductor active layer and defining a drain side of said semiconductor device, a channel region being between said source electrode and said drain electrode;
- a compound semiconductor high potential barrier layer formed on said compound semiconductor active layer and solely on the drain side of said semiconductor device, said compound semiconductor high potential barrier layer having a wider energy band gap than said compound semiconductor active layer;
- and
- a gate electrode formed between said source electrode and said drain electrode and having respective Schottky contacts with said compound semiconductor active layer on the source side of said semiconductor device and with said compound semiconductor high potential barrier layer on the drain side of said semiconductor device.
4 more elements
A field effect semiconductor device comprising:
- a compound semiconductor active layer;
- first and second current electrode structures formed on and respectively making Ohmic contacts with said active layer;
- a gate electrode disposed between said first and second current electrode structures and on said active layer to define a first side of said gate electrode which is closer to said first current electrode structure than said second current electrode structure and a second side of said gate electrode which is closer to said second current electrode structure than said first current electrode structure, said gate electrode making a Schottky contact with said active layer;
- and
- relaxing means for relaxing an electric field formed under the first side of said gate electrode, said relaxing means comprising a potential barrier layer formed of a semiconductor having a wider energy band gap than said active layer and disposed between said gate electrode and said active layer, the barrier layer having a larger thickness under the first side of said gate electrode than under the second side of the gate electrode.
2 more elements
A field effect semiconductor device comprising:
- a semi-insulating compound semiconductor substrate;
- a compound semiconductor active layer formed on said semi-insulating compound semiconductor substrate;
- a source electrode formed on, and having ohmic contact with, said compound semiconductor active layer and defining a source side of said semiconductor device;
- a drain electrode formed on, and having ohmic contact with, said compound semiconductor active layer and defining a drain side of said semiconductor device, a channel region being between said source electrode and said drain electrode;
- a compound semiconductor high potential barrier layer formed on said compound semiconductor active layer on the drain side of said semiconductor device, said compound semiconductor high potential barrier layer having a wider energy band gap than said compound semiconductor active layer;
- and
- a gate electrode formed between said source electrode and said drain electrode and having respective Schottky contacts with said compound semiconductor active layer on the source side of said semiconductor device and with said compound semiconductor high potential barrier layer on the drain side of said semiconductor device, said gate electrode overlapping said compound semiconductor high potential barrier layer at least by 100 nm.
4 more elements
Dependencies are inferred from the claim text.